本文關(guān)鍵詞： CAN分析儀 FPGA VHDL語言 SOPC 以太網(wǎng)通訊　出處：《上海師范大學(xué)》2013年碩士論文　論文類型：學(xué)位論文

【摘要】：隨著物聯(lián)網(wǎng)中各種電控單元之間信息交換需求的迅速增多，現(xiàn)場總線技術(shù)受到研究人員的極大關(guān)注。CAN（控制器局域網(wǎng)絡(luò)，Controller Area Network）總線由于高可靠性、實(shí)時性和成本合理等優(yōu)點(diǎn)而被大量應(yīng)用于汽車電子、航天航空、工業(yè)測控等各個領(lǐng)域中。CAN總線通訊仿真與測試平臺是CAN總線產(chǎn)品開發(fā)過程中的必備工具，用來構(gòu)造基于開發(fā)-驗(yàn)證思想的V型開發(fā)流程，實(shí)現(xiàn)CAN總線產(chǎn)品的設(shè)計(jì)仿真、產(chǎn)品測試和故障檢測，因此開發(fā)擁有自主知識產(chǎn)權(quán)、價格合理的CAN總線通訊仿真與測試平臺具有很好的實(shí)用價值和應(yīng)用前景。 本文主要成果： （1）認(rèn)真分析當(dāng)今國際電子行業(yè)中CAN總線通訊仿真與測試平臺的發(fā)展趨勢，確定論文的寫作主題； （2）仔細(xì)分析傳統(tǒng)CAN分析儀的實(shí)現(xiàn)方法與技術(shù)，本論文采用FPGA（現(xiàn)場可編程門陣列，F(xiàn)ield ProgrammableGate Array）SOPC(可編程片上系統(tǒng)，systemon a programmable chip）單芯片系統(tǒng)結(jié)構(gòu)，定制用戶IP核（知識產(chǎn)權(quán)核，IntellectualProperty Core），充分發(fā)揮FPGA并行處理能力，簡化外設(shè)硬件電路；采用硬件加速機(jī)制提高應(yīng)用程序執(zhí)行效率，并簡化程序代碼； （3）以國際標(biāo)準(zhǔn)CAN2.0B為基礎(chǔ)，認(rèn)真分析CAN總線通訊原理與協(xié)議規(guī)范，并用VHDL(非常高速集成電路硬件描述語言，Very-High-Speed IntegratedCircuit Hardware Description Language)語言在FPGA中完成CAN控制器IP核的設(shè)計(jì)； （4）仔細(xì)分析傳統(tǒng)CAN總線通訊仿真與測試平臺的數(shù)據(jù)傳輸方式，充分考慮該平臺對遠(yuǎn)程環(huán)境的支持，提出用以太網(wǎng)進(jìn)行數(shù)據(jù)傳輸?shù)姆椒ā?本文對當(dāng)前CAN總線通訊仿真與測試平臺的研究現(xiàn)狀、CAN2.0B協(xié)議的通訊機(jī)制、傳統(tǒng)CAN分析儀的硬件實(shí)現(xiàn)方式做了詳細(xì)分析，，給出了CAN總線通訊與仿真測試平臺的硬件、固件、軟件的詳細(xì)設(shè)計(jì)方案。用TCP/IP網(wǎng)絡(luò)進(jìn)行數(shù)據(jù)傳輸保證了仿真與檢測時對數(shù)據(jù)傳輸速率的要求，也拓寬了產(chǎn)品的應(yīng)用場合；通過FPGA控制完成通訊接口的設(shè)計(jì)，可擴(kuò)展性好，靈活性強(qiáng)，穩(wěn)定性高；在FPGA中添加Nios II處理器設(shè)計(jì)，使平臺的體積和功耗都大為減少。
[Abstract]:With the rapid increase in the demand for information exchange between various electronic control units in the Internet of things, fieldbus technology has attracted a lot of attention from researchers. Controller Area Network (Controller Area Network) bus is widely used in automotive electronics and aerospace industry because of its high reliability, real-time performance and reasonable cost. Can bus communication simulation and test platform is an essential tool in the process of CAN bus product development, which is used to construct the V-shaped development process based on the idea of development-verification. CAN bus product design simulation, product testing and fault detection, so the development has its own intellectual property rights. The reasonable price CAN bus communication simulation and test platform has good practical value and application prospect. The main achievements of this paper are: 1) analyzing the development trend of CAN bus communication simulation and testing platform in the international electronic industry, and determining the writing theme of the thesis; In this paper, FPGA (Field Programmable Gate Array) is used. Field ProgrammableGate Arrayn SOPC (system on Programmable Chip). Systemon a programmable chip system structure, customized user IP core (IP core). IntellectualProperty core can give full play to the parallel processing ability of FPGA and simplify the peripheral hardware circuit. Using hardware acceleration mechanism to improve the efficiency of application execution and simplify the program code; Based on the international standard CAN2.0B, the communication principle and protocol specification of CAN bus are carefully analyzed, and the very high speed integrated circuit hardware description language is used. Very-High-Speed IntegratedCircuit Hardware Description language). The IP core of CAN controller is designed in FPGA. 4) the data transmission mode of the traditional CAN bus communication simulation and test platform is analyzed in detail. Considering the support of the platform to the remote environment, the method of data transmission using Ethernet is put forward. In this paper, the communication mechanism of CAN2.0B protocol and the hardware implementation of traditional CAN analyzer are analyzed in detail. The detailed design of hardware, firmware and software of CAN bus communication and simulation test platform is given. The data transmission using TCP/IP network ensures the requirement of data transmission rate in simulation and detection. It also widens the application field of the product; The design of communication interface is completed by FPGA control, which has the advantages of good expansibility, high flexibility and high stability. By adding Nios II processor design to FPGA, the volume and power consumption of the platform are greatly reduced.
【學(xué)位授予單位】：上海師范大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP336

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