發(fā)布時間：2018-07-16 09:15

【摘要】：綜合校時模塊是我公司自行研制的通信設(shè)備上一個時間校正模塊，具有一套相對獨立的電路，其作用是是利用GPS衛(wèi)星授時系統(tǒng)和短波授時系統(tǒng)獲得準確的時間。 本文首先對GPS授時原理和短波授時原理進行了闡述，著重介紹了短波授時技術(shù)，介紹了短波時號的組成特點，同時分析了短波時碼信號傳輸?shù)娜觞c，介紹了短波時碼接收的設(shè)備，并描述了短波授時實現(xiàn)的方法。 然后介紹了綜合校時模塊的具體指標參數(shù)，定下了模塊的方案，決定模塊分為短波接收機、GPS接收機和信號處理板3部分。接下來分別描述了3部分的方案，設(shè)計出了各部分的工作流程。 接下來重點講述了信號處理板實現(xiàn)，，介紹了信號處理板的硬件組成，介紹了信號處理板的具體軟件設(shè)計。包括了GPS功能實現(xiàn)軟件工作流程和短波校時功能實現(xiàn)的軟件工作流程，以及校時綜合模塊內(nèi)外部的具體接口協(xié)議及實現(xiàn)。 由于晶體振蕩器頻率具有溫漂特性和工程中容易被干擾的特點，本文還提出了一種時鐘芯片的頻率校正方法。該方法根據(jù)時鐘芯片自身的電路特點，利用FPGA和單片機計算時鐘芯片頻率偏移，通過增加或減少脈沖對其進行補償，達到頻率校正目的，確保時鐘芯片的守時精度。將該方法運用到實際的工程運用中后，獲得較好的效果。為以后時鐘芯片的頻率校正的工程實現(xiàn)提供了一個有力的參考。 最后介紹了模塊的測試方法，給出了模塊測試的原理框圖，并具體對每個指標進行了測試。該模塊目前通過的驗收測試，并應(yīng)用于通信設(shè)備上，工作狀況良好。
[Abstract]:The integrated time correction module is a time correction module of communication equipment developed by our company. It has a set of relatively independent circuits. Its function is to obtain accurate time by using GPS satellite time service system and short wave time service system. In this paper, the principle of GPS time service and the principle of shortwave time service are introduced, and the short wave time service technology is introduced, and the characteristics of the short wave time signal are introduced. At the same time, the weakness of the short wave time code signal transmission is analyzed. This paper introduces the equipment of short wave time code receiving, and describes the method of short wave time service. Then the specific index parameters of the integrated timing module are introduced and the scheme of the module is determined. The module is divided into three parts: the short wave receiver GPS receiver and the signal processing board. Then, three parts of the scheme are described, and the workflow of each part is designed. Then the realization of the signal processing board is introduced, the hardware structure of the signal processing board is introduced, and the software design of the signal processing board is introduced. It includes the software workflow of GPS function realization and the software workflow of short wave timing function realization, as well as the concrete interface protocol and realization of the internal and external interface of the timing synthesis module. Because the frequency of crystal oscillator has the characteristic of temperature drift and easy to be interfered in engineering, a frequency correction method for clock chip is also presented in this paper. According to the circuit characteristics of the clock chip, the frequency offset of the clock chip is calculated by using FPGA and single chip microcomputer, and the frequency correction is achieved by adding or reducing the pulse to ensure the timing accuracy of the clock chip. The method is applied to practical engineering, and good results are obtained. It provides a powerful reference for the realization of frequency correction of clock chip. Finally, the testing method of the module is introduced, the principle diagram of the module test is given, and each index is tested. The module has passed the acceptance test and has been applied to the communication equipment in good working condition.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：P228.4

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本文編號：2125928