快速中值濾波算法研究及其FPGA硬件實(shí)現(xiàn)
發(fā)布時(shí)間:2019-03-02 17:43
【摘要】:針對(duì)圖像噪聲大和對(duì)比度差特點(diǎn),提出了一種水下圖像快速中值濾波算法及FPGA硬件實(shí)現(xiàn)。通過(guò)分析中值濾波算法,以3×3窗口為數(shù)學(xué)模型,以CycloneⅢ EP3C40F324I7為核心處理芯片,用VHDL語(yǔ)言實(shí)現(xiàn)模型中所需要的模塊,實(shí)現(xiàn)了快速中值濾波算法對(duì)圖像的處理。通過(guò)硬件實(shí)驗(yàn)結(jié)果對(duì)比,系統(tǒng)達(dá)到了抑制噪聲保持原圖像的目的。該設(shè)計(jì)在水下圖像處理中具有一定的工程參考及應(yīng)用價(jià)值。
[Abstract]:In this paper, a fast median filtering algorithm and FPGA hardware implementation for underwater image are proposed according to the characteristics of high noise and poor contrast. By analyzing the median filtering algorithm, taking 3 脳 3 window as the mathematical model and Cyclone鈪,
本文編號(hào):2433301
[Abstract]:In this paper, a fast median filtering algorithm and FPGA hardware implementation for underwater image are proposed according to the characteristics of high noise and poor contrast. By analyzing the median filtering algorithm, taking 3 脳 3 window as the mathematical model and Cyclone鈪,
本文編號(hào):2433301
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