【摘要】：隨著SiC技術的發(fā)展,SiC功率器件性能的提升會像Si功率器件一樣受到理論極限的制約。因此將打破Si限的超結結構應用到SiC器件中進一步提升功率器件性能具有順應時代發(fā)展需要,滿足器件應用領域的重要意義。本文主要設計并優(yōu)化了一款1400VSiC超結VDMOS的元胞結構,主要工作及成果如下:首先,對SiC VDMOS的基本結構和基本工作原理進行研究,介紹VDMOS的主要靜態(tài)參數(shù):閾值電壓、擊穿電壓、導通電阻,并分析了器件各部分設計參數(shù)(長度、注入深度、摻雜濃度等)對其靜態(tài)電特性的影響。另外還研究了超結的基本理論和設計公式,并分析了超結的設計參數(shù)對擊穿電壓和導通電阻的影響。其次,對漂移區(qū)、JFET區(qū)、溝道、P型阻擋層、P型基區(qū)等1400V碳化硅超結VDMOS元胞區(qū)元胞的基本參數(shù)進行設計并優(yōu)化。以1400V阻斷電壓為設計目標,兼顧特征導通電阻和器件工作的可靠性,在理論分析基礎上,采用TCAD仿真軟件基于器件特性數(shù)據(jù),分析了各區(qū)濃度和尺寸、超結結構參數(shù)對MOSFET功率參數(shù)的影響,基于影響曲線,折中考慮擊穿電壓,導通電阻,JFET區(qū)柵氧化層擊穿,P阱區(qū)穿通,閾值電壓等因素,確定了超結VDMOS元胞區(qū)各區(qū)的參數(shù),分別為:漂移區(qū)厚度9um、超結P柱、N柱濃度均為1.9×1016cm-3-,JFET區(qū)長度(0.5um*2),溝道長度0.5um,P型阻擋層深度0.3um、濃度1.5×1018cm3,P型基區(qū)濃度5×1016cm-3等。最后,本文提出一種局部非平衡超結結構,其PN柱摻雜是采用局部失配,總體平衡進行的。將此結構應用到VDMOS中并與傳統(tǒng)N型漂移區(qū)VDMOS、普通超結VDMOS進行對比。保證三者的厚度和濃度相同,比較擊穿電壓的變化,發(fā)現(xiàn)改進的局部失配超結VDMOS具有最高的擊穿電壓。同時還給出了三者的特征導通電阻,計算了品質因子(VB2/R),改進的局部失配超結結構的品質因子高于傳統(tǒng)器件而低于完全平衡的普通超結結構。綜上,本文的主要工作為設計并優(yōu)化了可用于1400V阻斷電壓的SiC超結VDMOS元胞結構,提出了一種局部非平衡超結結構,研究結果表明超結結構有效提升了 SiC VDMOS的功率性能;而提出的局部非平衡超結結構則能夠進一步提高SiC VDMOS的阻斷電壓,是一種提高SiC超結VDMOS耐壓的有效方法。
[Abstract]:With the development of SiC technology, the performance improvement of SiC power devices will be restricted by the theoretical limit just as the Si power devices. Therefore, it is important to apply the superjunction structure which breaks the Si limit to the SiC devices to further improve the performance of the power devices, which meets the needs of the times and meets the needs of the application field of the devices. This paper mainly designs and optimizes the cellular structure of a 1400VSiC superjunction VDMOS. The main work and results are as follows: firstly, the basic structure and basic working principle of SiC VDMOS are studied, and the main static parameters of VDMOS are introduced: threshold voltage, breakdown voltage. The influence of the design parameters (length, injection depth, doping concentration, etc.) on the static electrical characteristics of the device is analyzed. In addition, the basic theory and design formula of overjunction are studied, and the influence of design parameters of overjunction on breakdown voltage and on-resistance is analyzed. Secondly, the basic parameters of 1400V silicon carbide superjunction VDMOS cell region, such as drift region, JFET region, channel, P-type barrier layer and P-type base region, are designed and optimized. Taking 1400V blocking voltage as the design target, taking into account the characteristic on-resistance and the reliability of the device, the concentration and size of each region are analyzed by using the TCAD simulation software based on the characteristic data of the device, based on the theoretical analysis. Based on the influence of the structure parameters on the power parameters of MOSFET, based on the influence curve, considering the breakdown voltage, on-resistance, JFET gate oxide breakdown, P-well breakdown, threshold voltage and so on, the parameters of the superjunction VDMOS cell are determined. The thickness of drift zone is 9um, the concentration of N column is 1.9 脳 1016cm-3-JFET (0.5um*2), the depth of channel length is 0.3ump barrier layer, and the concentration is 1.5 脳 1018cm3C3P type base area concentration 5 脳 1016cm-3, and so on, the drift zone thickness is 9 umum, the N column concentration is 1.9 脳 1016cm-3-JFET zone length (0.5um*2), the channel length is 0.5ump type barrier layer depth 0.3um. Finally, a local nonequilibrium superjunction structure is proposed, in which the PN column doping is carried out by local mismatch and overall equilibrium. The structure is applied to VDMOS and compared with the conventional N-type drift VDMOS, superjunction VDMOS. It is found that the improved local mismatched overjunction (VDMOS) has the highest breakdown voltage by comparing the breakdown voltage with the same thickness and concentration. At the same time, the characteristic on-resistance of the three devices is given, and the quality factor (VB2/R) is calculated. The quality factor of the improved local mismatch superjunction structure is higher than that of the conventional device and is lower than that of the conventional overjunction structure. In summary, the main work of this paper is to design and optimize the SiC superjunction VDMOS cell structure which can be used for 1400V blocking voltage. A local non-equilibrium superjunction structure is proposed. The results show that the superjunction structure can effectively improve the power performance of SiC VDMOS. The proposed local nonequilibrium superjunction structure can further improve the blocking voltage of SiC VDMOS and is an effective method to improve the VDMOS voltage of SiC overjunction.
【學位授予單位】：山東大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN386

【相似文獻】

相關期刊論文 前10條

1 楊永暉;唐昭煥;張正元;劉勇;王志寬;譚開洲;馮志成;;A novel structure in reducing the on-resistance of a VDMOS[J];半導體學報;2011年02期

2 唐昭煥;胡剛毅;陳光炳;譚開洲;劉勇;羅俊;徐學良;;A novel structure for improving the SEGR of a VDMOS[J];半導體學報;2012年04期

3 王英;何杞鑫;方紹華;;高壓功率VDMOS管的設計研制[J];電子器件;2006年01期

4 楊東林;孫偉鋒;劉俠;;700V VDMOS設計[J];電子器件;2007年02期

5 劉俠;孫偉鋒;王欽;楊東林;;高壓VDMOS電容的研究[J];電子器件;2007年03期

6 蔡小五;海潮和;王立新;陸江;;新型低壓超結功率VDMOS器件數(shù)值模擬[J];功能材料與器件學報;2007年05期

7 徐丹;殷景華;王鑫宇;;VDMOS器件微觀結構研究[J];應用科技;2007年11期

8 劉剛;蔡小五;韓鄭生;陸江;王立新;夏洋;;國產(chǎn)VDMOS電離輻射環(huán)境中的敏感參數(shù)研究[J];核技術;2008年08期

9 譚開洲;胡剛毅;楊謨?nèi)A;徐世六;張正t，

本文編號：2409388