用于光纖陀螺儀的帶通Sigma-Delta調(diào)制器的研究與設(shè)計(jì)
發(fā)布時(shí)間：2019-01-01 10:23
【摘要】：隨著無線通信及光纖陀螺技術(shù)和集成電路工藝水平的不斷進(jìn)步,對高精度模數(shù)轉(zhuǎn)換器(ADCs)的需求也越來越大。Sigma-Delta ADC,相較于奈奎斯特ADC,因其對電路元器件匹配精度不敏感,而在高精度應(yīng)用方面表現(xiàn)出更大的優(yōu)勢。另一方面,就對窄帶中頻或射頻信號的轉(zhuǎn)換而言,帶通轉(zhuǎn)換器比低通轉(zhuǎn)換器的轉(zhuǎn)換效率更高,這也使得帶通Sigma-Delta ADC在無線通信和光纖陀螺系統(tǒng)中的應(yīng)用更為廣泛。帶通Sigma-Delta ADC由帶通Sigma-Delta調(diào)制器和數(shù)字抽取濾波器組成,其性能主要由調(diào)制器決定,而調(diào)制器的性能則主要依賴于所使用的諧振器。因此設(shè)計(jì)一款優(yōu)良的諧振器結(jié)構(gòu)對于實(shí)現(xiàn)高性能ADC來說至關(guān)重要。當(dāng)前諧振器結(jié)構(gòu)主要有三種,即前饋歐拉型、無損離散積分型和雙延時(shí)型。但是雙延時(shí)結(jié)構(gòu)相較于其他兩種結(jié)構(gòu)的優(yōu)勢在于,對電容失配不敏感。也就是說,雙延時(shí)結(jié)構(gòu)可以精確地實(shí)現(xiàn)中心頻率為采樣頻率的1/4的諧振器。此外,雙延時(shí)諧振器可以通過級聯(lián)兩個(gè)延時(shí)單元或使用偽多路徑結(jié)構(gòu)來實(shí)現(xiàn)。但是級聯(lián)延時(shí)單元需要兩個(gè)運(yùn)放,所以功耗會更大;而偽多路徑結(jié)構(gòu)的時(shí)鐘太過復(fù)雜,這會使是時(shí)鐘產(chǎn)生電路的設(shè)計(jì)變得復(fù)雜且會占用較大的芯片面積。為了解決上述問題,本文改進(jìn)出一款雙延時(shí)諧振器結(jié)構(gòu),它只使用一個(gè)運(yùn)放并且它的時(shí)鐘信號相對偽多路徑結(jié)構(gòu)要簡單的多。為了驗(yàn)證改進(jìn)的雙延時(shí)諧振器的有效性,在0.25μm標(biāo)準(zhǔn)CMOS工藝下設(shè)計(jì)了一款四階帶通Sigma-Delta調(diào)制器。仿真結(jié)果表明,在5V電源電壓下,該調(diào)制器的SNR為116.7dB,功耗為4.87mW,并由此計(jì)算出其FOM為11.17W/Hz。
[Abstract]:With the development of wireless communication, fiber optic gyroscope technology and integrated circuit technology, the demand for high precision ADC (ADCs) is also increasing. Compared with Nyquist ADC, Sigma-Delta ADC, is more and more important. Because it is insensitive to the matching accuracy of circuit components, it has more advantages in high precision applications. On the other hand, bandpass converters are more efficient than low-pass converters for narrow band intermediate frequency or RF signal conversion, which makes bandpass Sigma-Delta ADC more widely used in wireless communication and fiber optic gyroscope systems. The bandpass Sigma-Delta ADC consists of a bandpass Sigma-Delta modulator and a digital decimation filter. The performance of the band-pass Sigma-Delta modulator is mainly determined by the modulator, and the performance of the modulator is mainly dependent on the resonator used. So it is very important to design an excellent resonator structure for high performance ADC. At present, there are three main resonator structures: feedforward Euler type, lossless discrete integral type and double delay type. But the advantage of dual delay structure over other two structures is that it is insensitive to capacitance mismatch. That is to say, the dual delay structure can accurately realize a resonator with a central frequency of 1 / 4 of the sampling frequency. In addition, dual delay resonators can be implemented by cascading two delay cells or using pseudo multipath structures. However, the cascaded delay cells require two operational amplifiers, so the power consumption will be higher; and the clock with pseudo multipath structure is too complex, which makes the design of clock generation circuit complex and takes up a large chip area. In order to solve the above problem, we improve a dual-delay resonator structure, which uses only one op amplifier and its clock signal is much simpler than pseudo-multipath structure. In order to verify the effectiveness of the improved dual-delay resonator, a four-order band-pass Sigma-Delta modulator is designed in 0.25 渭 m standard CMOS process. The simulation results show that the SNR of the modulator is 116.7 dB and the power consumption is 4.87 MW, and its FOM is 11.17 W / Hz.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN761
，
本文編號：2397420
[Abstract]:With the development of wireless communication, fiber optic gyroscope technology and integrated circuit technology, the demand for high precision ADC (ADCs) is also increasing. Compared with Nyquist ADC, Sigma-Delta ADC, is more and more important. Because it is insensitive to the matching accuracy of circuit components, it has more advantages in high precision applications. On the other hand, bandpass converters are more efficient than low-pass converters for narrow band intermediate frequency or RF signal conversion, which makes bandpass Sigma-Delta ADC more widely used in wireless communication and fiber optic gyroscope systems. The bandpass Sigma-Delta ADC consists of a bandpass Sigma-Delta modulator and a digital decimation filter. The performance of the band-pass Sigma-Delta modulator is mainly determined by the modulator, and the performance of the modulator is mainly dependent on the resonator used. So it is very important to design an excellent resonator structure for high performance ADC. At present, there are three main resonator structures: feedforward Euler type, lossless discrete integral type and double delay type. But the advantage of dual delay structure over other two structures is that it is insensitive to capacitance mismatch. That is to say, the dual delay structure can accurately realize a resonator with a central frequency of 1 / 4 of the sampling frequency. In addition, dual delay resonators can be implemented by cascading two delay cells or using pseudo multipath structures. However, the cascaded delay cells require two operational amplifiers, so the power consumption will be higher; and the clock with pseudo multipath structure is too complex, which makes the design of clock generation circuit complex and takes up a large chip area. In order to solve the above problem, we improve a dual-delay resonator structure, which uses only one op amplifier and its clock signal is much simpler than pseudo-multipath structure. In order to verify the effectiveness of the improved dual-delay resonator, a four-order band-pass Sigma-Delta modulator is designed in 0.25 渭 m standard CMOS process. The simulation results show that the SNR of the modulator is 116.7 dB and the power consumption is 4.87 MW, and its FOM is 11.17 W / Hz.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN761
，
本文編號：2397420
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