基于離散螢火蟲的眾核SoC映射方法研究
[Abstract]:The problem of NoC mapping is one of the hotspots in the field of NoC. The quality of the mapping directly affects the performance of the whole network system on chip in terms of delay, power consumption and so on. Most of the existing researches apply heuristic optimization algorithm to solve the problem of on-chip network mapping, but the optimization time of the algorithm is too long, when the public kernel scale is large, it needs a lot of computing time and resources. The improved algorithm improves the optimization speed by sacrificing the accuracy of the solution. Firefly algorithm is a new heuristic optimization algorithm. This paper solves the problem of network mapping on chip based on discrete firefly algorithm. The main work is as follows: 1. 2D on-chip network mapping algorithm based on discrete firefly algorithm. Because the existing discrete fireflies algorithm can not solve the 2D NoC mapping problem, the class of fireflies is redefined so that the discrete fireflies algorithm is associated with the on-chip network mapping. The initialization rules of 2D mapping algorithm are redefined, and the initialization mapping scheme is given at random. The calculation method of redefining the distance between fireflies is used as a factor to judge movement. Firefly moving rules are defined as 偽 moving step and 尾 moving step to find a better mapping scheme. The experimental results of 2D on-chip network mapping show that, compared with the optimal mapping scheme in initialization, The total communication loss of the global optimal mapping scheme is optimized by 41.46. Compared with discrete Particle Swarm Optimization (DPSO), the algorithm has more searching ability. The maximum average microchip delay is 58.005, and the average packet delay is 42.874.2. 3D On-chip Network Mapping algorithm based on discrete Firefly algorithm: redefining initialization rules and calculating distance between fireflies according to 3D NoC topology characteristics. The experimental results of 3D on-chip network mapping show that, Compared with the discrete particle swarm optimization algorithm, the optimal mapping scheme can be found. Compared with the discrete Particle Swarm Optimization (DPSO) algorithm, the stability of the algorithm is better. The maximum execution time of CPU is optimized by 69.656. A network interface supporting multiple access and a flow generator based on self-similarity are designed. According to the one-to-many, many-to-one communication relationship of feature application neutron tasks, a network interface RTL level model is proposed to support multiplex access. The flow generator of arbitration request is rotated by priority list, and the mapping simulation experiment is completed by combining with the existing on-chip network simulation platform. In order to better simulate the traffic characteristics in the real network, a self-similar flow generator is designed. The ON/OFF model is used to generate the length of the outgoing cycle and the idle period, according to which the contract is sent. The network interface of multiple access and the simulation experiment of flow generator based on self-similarity show that the function of the two modules is correct.
【學(xué)位授予單位】:合肥工業(yè)大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類號(hào)】:TN47
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