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基于置信規(guī)則庫(kù)的電路可靠性容差分析方法

發(fā)布時(shí)間:2018-11-03 16:01
【摘要】:電路可靠性容差分析是數(shù)/模電路設(shè)計(jì)與研發(fā)過(guò)程中的一個(gè)重要環(huán)節(jié),對(duì)于提高產(chǎn)品生產(chǎn)中的成品率,以及使用中的可靠性是十分重要的。目前對(duì)電路可靠性容差分析主要涉及兩大類方法,一是基于統(tǒng)計(jì)分析方法,二是基于幾何逼近的確定性方法,這些方法通常具有計(jì)算量大、要求電路性能函數(shù)形式較為簡(jiǎn)單(其對(duì)應(yīng)的設(shè)計(jì)域?yàn)閱芜B通凸形)等缺點(diǎn),這限制了它們?cè)趯?shí)際電路設(shè)計(jì)中的應(yīng)用。實(shí)際上,在電路設(shè)計(jì)與電路仿真中,電路設(shè)計(jì)者或使用者會(huì)積累一些具有主觀性和不確定性的經(jīng)驗(yàn)知識(shí),若將這些主觀知識(shí)與電路仿真客觀數(shù)據(jù)相結(jié)合進(jìn)行容差分析,必將提升電路設(shè)計(jì)的效率并縮短產(chǎn)品的研發(fā)周期。為了實(shí)現(xiàn)該目的,本文基于置信規(guī)則庫(kù)模型,將主觀經(jīng)驗(yàn)信息與電路仿真數(shù)據(jù)相結(jié)合,給出新的電路可靠性容差分析及模型優(yōu)化方法,主要工作包括:(1)基于置信規(guī)則庫(kù)(BRB)的電路容差設(shè)計(jì)方法。建立描述電路元件參數(shù)值與電路性能指標(biāo)值之間非線性映射關(guān)系的BRB模型;在設(shè)計(jì)域呈現(xiàn)非連通和非凸形的復(fù)雜情況下,提出基于BRB的電路容差初值求解及容差域優(yōu)化方法;通過(guò)Rosenbrock型的電路性能指標(biāo)函數(shù)以及實(shí)際的軌道電路調(diào)諧單元共振性能指標(biāo)函數(shù)為例,驗(yàn)證了在設(shè)計(jì)域非連通和非凸形情況下,所提方法在相對(duì)小的計(jì)算代價(jià)下,可以精確地從設(shè)計(jì)域中確定所有的元件容差及中心值。(2)基于置信規(guī)則庫(kù)的電路中心值設(shè)計(jì)方法。當(dāng)問(wèn)題(1)中元件容差固定時(shí),電路容差分析就是要找到元件的最優(yōu)中心值(標(biāo)稱值)。建立基于BRB的電路可靠度估計(jì)模型,用其描述電路元件參數(shù)中心值與電路可靠度之間的非線性映射關(guān)系;然后,提出基于BRB電路中心值設(shè)計(jì)方法,其與傳統(tǒng)的統(tǒng)計(jì)分析方法相比,在計(jì)算量較低的前提下,不僅能找到單一的最優(yōu)中心值,更能確定滿足可靠度要求的整個(gè)中心值的設(shè)計(jì)域,從而為設(shè)計(jì)者提供多個(gè)備選的中心值;最后,本文仍利用軌道電路調(diào)諧單元元件參數(shù)中心值設(shè)計(jì)為例說(shuō)明所提方法的有效性。(3)基于序列線性規(guī)劃的BRB模型參數(shù)優(yōu)化方法。通過(guò)對(duì)前兩個(gè)問(wèn)題中BRB參數(shù)優(yōu)化模型的目標(biāo)函數(shù)與約束條件進(jìn)行一階泰勒展開(kāi),將參數(shù)優(yōu)化的非線性規(guī)劃問(wèn)題轉(zhuǎn)化較為簡(jiǎn)單的線性規(guī)劃問(wèn)題;然后給定參數(shù)尋優(yōu)移動(dòng)限,確定尋優(yōu)區(qū)間,進(jìn)行線性搜索,將搜索結(jié)果用作新基點(diǎn),重新線性化,直至找到滿足停止準(zhǔn)則的BRB模型參數(shù);該方法與傳統(tǒng)其他非線性優(yōu)化方法相比,線性規(guī)劃問(wèn)題是較容易解決且精確度較高的方法,且該方法可以從可行解空間中的任意一點(diǎn)出發(fā)對(duì)參數(shù)進(jìn)行訓(xùn)練優(yōu)化;最后本文仍利用軌道電路調(diào)諧單元元件參數(shù)中心值設(shè)計(jì)為例,驗(yàn)證本方法在訓(xùn)練BRB模型參數(shù)上,優(yōu)化效率高的優(yōu)勢(shì)。
[Abstract]:Reliability tolerance analysis of circuits is an important part in the design and development of digital / analog circuits. It is very important to improve the product yield in production and the reliability in use. At present, the reliability tolerance analysis of circuits mainly involves two kinds of methods, one is based on statistical analysis method, the other is deterministic method based on geometric approximation. The simple form of circuit performance function (the corresponding design domain is a simple connected convex shape) is required, which limits their application in practical circuit design. In fact, in the circuit design and circuit simulation, the circuit designer or user will accumulate some subjective and uncertain experience knowledge. If the subjective knowledge is combined with the objective data of circuit simulation for tolerance analysis, It will improve the efficiency of circuit design and shorten the R & D cycle of products. In order to achieve this goal, a new method of reliability tolerance analysis and model optimization is presented by combining subjective empirical information with circuit simulation data based on the confidence rule base model. The main work includes: (1) the design method of circuit tolerance based on confidence rule base (BRB). A BRB model describing the nonlinear mapping relationship between circuit component parameter values and circuit performance index values is established, and an initial solution of circuit tolerance based on BRB and an optimization method in tolerance domain are proposed in the case of disconnected and non-convex design domain. Through the examples of the Rosenbrock type circuit performance function and the actual track circuit tuning unit resonance performance function, it is verified that the proposed method is of relatively small computational cost in the case of non-connected and non-convex design domain. All components tolerance and center values can be accurately determined from the design domain. (2) the circuit center value design method based on confidence rule base. When the component tolerance in problem (1) is fixed, the circuit tolerance analysis is to find the optimal center value (nominal value). The reliability estimation model based on BRB is established and used to describe the nonlinear mapping relationship between the central value of circuit component parameters and the reliability of the circuit. Then, the center value design method based on BRB circuit is proposed. Compared with the traditional statistical analysis method, the method can not only find the single optimal center value, but also find a single optimal center value. The design domain of the whole center value that meets the reliability requirement can be determined more, thus providing multiple alternative center values for the designer; Finally, an example is given to illustrate the effectiveness of the proposed method. (3) the BRB model parameter optimization method based on sequential linear programming (SLP). Through the first order Taylor expansion of the objective function and constraint conditions of the BRB parameter optimization model in the first two problems, the nonlinear programming problem of parameter optimization is transformed into a simple linear programming problem. Then given the parameter optimization moving limit, the optimization interval is determined, the linear search is carried out, and the search result is used as a new base point, and the search result is re-linearized until the parameters of the BRB model satisfying the stopping criterion are found. Compared with other traditional nonlinear optimization methods, the linear programming problem is easy to solve and has higher accuracy, and the method can train and optimize the parameters from any point in the feasible solution space. Finally, the center value design of track circuit tuning element is used as an example to verify the superiority of this method in training the parameters of BRB model with high optimization efficiency.
【學(xué)位授予單位】:杭州電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2016
【分類號(hào)】:TN702

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