12位200MHz電流舵型DAC的設(shè)計(jì)
發(fā)布時(shí)間：2018-11-03 08:06
【摘要】：數(shù)模轉(zhuǎn)換器(Digital-to-Analog Converter,簡(jiǎn)稱DAC)是數(shù)字電路和模擬電路的重要接口。隨著數(shù)字技術(shù)的快速提升,處理數(shù)字信號(hào)的速度越來(lái)越快,這就迫切的要求數(shù)模轉(zhuǎn)換器高速高精度。 本文通過(guò)研究DAC的基本原理和基本結(jié)構(gòu),并分析每種結(jié)構(gòu)的優(yōu)缺點(diǎn),然后按照由上到下全定制的方法設(shè)計(jì)了一個(gè)12位200MHz電流舵型數(shù)模轉(zhuǎn)換器。本文所設(shè)計(jì)的DAC主要包括寄存器、譯碼電路、限幅電路、電流源及開關(guān)陣列、偏置電路。本文重點(diǎn)介紹了偏置電路中的帶隙基準(zhǔn)電路、電壓-電流轉(zhuǎn)換電路和運(yùn)算放大器的設(shè)計(jì)原理及方法,仿真分析了帶隙基準(zhǔn)電路的溫漂系數(shù)和電源抑制比和運(yùn)算放大器的增益、相位裕度和帶寬。本論文還分析了電流源失配對(duì)DAC的SFDR的影響并確定了電流源尺寸,并設(shè)計(jì)了一個(gè)開關(guān)控制信號(hào)的限幅電路,分析了降低時(shí)鐘饋通的原理。本文還著重分析了高六位所對(duì)應(yīng)電流源陣列的版圖布局,設(shè)計(jì)了譯碼電路中行列溫度計(jì)譯碼的選通電路,并對(duì)數(shù)字電路中寄存器、鎖存器進(jìn)行了仿真分析。 本文基于SMIC0.18μm工藝,利用Cadence Specter仿真工具設(shè)計(jì)了一個(gè)電源電壓為3.3V,滿偏電流為20mA,二進(jìn)制碼和溫度計(jì)碼分段譯碼方式的]2位200MHz電流舵型數(shù)模轉(zhuǎn)換器(DAC)。在此電路中設(shè)計(jì)了高頻下具有高輸出阻抗的PMOS共源共柵電流源,從而保證了電路具有良好的SFDR。高位電流源版圖采用了O2Random Walk布局方式來(lái)盡量減少因版圖布局引起的誤差。在信號(hào)頻率0.999876MHz,采樣頻率200MHz情況下SFDR仿真結(jié)果超過(guò)77dB。
[Abstract]:Digital to analog converter (Digital-to-Analog Converter,) is an important interface between digital circuit and analog circuit. With the rapid development of digital technology, the speed of digital signal processing is getting faster and faster. In this paper, the basic principle and structure of DAC are studied, and the advantages and disadvantages of each structure are analyzed. Then a 12-bit 200MHz current-rudder digital-to-analog converter is designed according to the method of top-down customization. The DAC designed in this paper mainly includes register, decoding circuit, limiting circuit, current source and switch array, bias circuit. This paper mainly introduces the design principle and method of bandgap reference circuit, voltage-current conversion circuit and operational amplifier in bias circuit. The temperature drift coefficient, power rejection ratio and gain of operational amplifier of bandgap reference circuit are simulated and analyzed. Phase margin and bandwidth. In this paper, the effect of current source mismatch on SFDR of DAC is analyzed and the size of current source is determined. A limiting circuit of switch control signal is designed, and the principle of reducing clock feedthrough is analyzed. In this paper, the layout of the current source array is analyzed, and the on-off circuit of the column thermometer decoding in the decoding circuit is designed, and the register and latch in the digital circuit are simulated and analyzed. Based on SMIC0.18 渭 m technology and Cadence Specter simulation tool, a 2-bit 200MHz current-rudder digital-to-analog converter (DAC).) with 3.3V power supply voltage, 20mA full bias current, binary code and thermometer code is designed in this paper. In this circuit, a high frequency PMOS source with high output impedance is designed, which ensures that the circuit has a good SFDR.. The high current source layout adopts O2Random Walk layout to minimize the error caused by layout. When the signal frequency is 0.999876MHz and the sampling frequency is 200MHz, the simulation result of SFDR exceeds 77dB.
【學(xué)位授予單位】：北方工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN792
本文編號(hào)：2307203
[Abstract]:Digital to analog converter (Digital-to-Analog Converter,) is an important interface between digital circuit and analog circuit. With the rapid development of digital technology, the speed of digital signal processing is getting faster and faster. In this paper, the basic principle and structure of DAC are studied, and the advantages and disadvantages of each structure are analyzed. Then a 12-bit 200MHz current-rudder digital-to-analog converter is designed according to the method of top-down customization. The DAC designed in this paper mainly includes register, decoding circuit, limiting circuit, current source and switch array, bias circuit. This paper mainly introduces the design principle and method of bandgap reference circuit, voltage-current conversion circuit and operational amplifier in bias circuit. The temperature drift coefficient, power rejection ratio and gain of operational amplifier of bandgap reference circuit are simulated and analyzed. Phase margin and bandwidth. In this paper, the effect of current source mismatch on SFDR of DAC is analyzed and the size of current source is determined. A limiting circuit of switch control signal is designed, and the principle of reducing clock feedthrough is analyzed. In this paper, the layout of the current source array is analyzed, and the on-off circuit of the column thermometer decoding in the decoding circuit is designed, and the register and latch in the digital circuit are simulated and analyzed. Based on SMIC0.18 渭 m technology and Cadence Specter simulation tool, a 2-bit 200MHz current-rudder digital-to-analog converter (DAC).) with 3.3V power supply voltage, 20mA full bias current, binary code and thermometer code is designed in this paper. In this circuit, a high frequency PMOS source with high output impedance is designed, which ensures that the circuit has a good SFDR.. The high current source layout adopts O2Random Walk layout to minimize the error caused by layout. When the signal frequency is 0.999876MHz and the sampling frequency is 200MHz, the simulation result of SFDR exceeds 77dB.
【學(xué)位授予單位】：北方工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN792
【參考文獻(xiàn)】
相關(guān)期刊論文 前1條
1 朱樟明;李亞妮;楊銀堂;;一種1.8V 10位120MS/s CMOS電流舵D/A轉(zhuǎn)換器IP核[J];半導(dǎo)體學(xué)報(bào);2008年03期
，本文編號(hào)：2307203
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