高電源抑制比低溫度系數(shù)超低功耗基準(zhǔn)電壓源
發(fā)布時(shí)間:2018-10-31 14:59
【摘要】:在0.18μm標(biāo)準(zhǔn)CMOS工藝模型下,利用亞閾值及深線性區(qū)MOS管的特性,設(shè)計(jì)了一種新穎的偏置電流產(chǎn)生電路,并采用此電路設(shè)計(jì)出一種具有高電源抑制比、低溫度系數(shù)的全MOS型基準(zhǔn)電壓源。該電壓源采用全MOS結(jié)構(gòu),不使用電阻,功耗超低。電源電壓在0.9~3V變化時(shí),該電壓源均可正常工作,輸出電壓約為558mV。1.2V電源電壓下,在-55℃~100℃溫度范圍內(nèi),該電壓源的溫度系數(shù)為2.3×10-5/℃,低頻電源抑制比為-81dB,總功耗約為127nW。
[Abstract]:In the 0.18 渭 m standard CMOS process model, a novel bias current generation circuit is designed based on the characteristics of subthreshold and deep linear MOS transistors, and a high power supply rejection ratio is designed. Low temperature coefficient full MOS voltage reference source. The voltage source adopts full MOS structure, no resistance and low power consumption. The output voltage is about 558mV.1.2V voltage, and the temperature coefficient of the source is 2.3 脳 10 ~ (-5) / 鈩,
本文編號(hào):2302612
[Abstract]:In the 0.18 渭 m standard CMOS process model, a novel bias current generation circuit is designed based on the characteristics of subthreshold and deep linear MOS transistors, and a high power supply rejection ratio is designed. Low temperature coefficient full MOS voltage reference source. The voltage source adopts full MOS structure, no resistance and low power consumption. The output voltage is about 558mV.1.2V voltage, and the temperature coefficient of the source is 2.3 脳 10 ~ (-5) / 鈩,
本文編號(hào):2302612
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