基于多鐵納磁體的擇多邏輯門三維磁化動態(tài)特性研究
發(fā)布時間:2018-10-15 09:05
【摘要】:建立了多鐵納磁體擇多邏輯門的三維磁化動態(tài)模型,并施加應變時鐘(應力或電壓)對多鐵擇多邏輯門的擇多計算功能進行了動態(tài)仿真,同時分析了應變時鐘工作機制以及它與擇多邏輯門可靠轉換之間的關系.仿真結果表明所建三維動態(tài)模型準確地描述了擇多邏輯門的工作機制,在30 MPa應力作用下,擇多邏輯門接受新輸入實現(xiàn)了正確的擇多計算功能.研究還發(fā)現(xiàn)對中心納磁體和輸出納磁體依次撤去應變時鐘時,提前撤去輸出納磁體上的應力會降低擇多邏輯門的正確計算概率,而延遲撤去輸出納磁體上的應力會降低擇多邏輯門的工作頻率.研究結果深化了人們對多鐵擇多邏輯門動態(tài)特性的認識,可為多鐵邏輯電路的設計提供重要指導.
[Abstract]:A three-dimensional magnetization dynamic model of multi-gate magnets is established, and the dynamic simulation of the multi-logic gate with strain clock (stress or voltage) is carried out. At the same time, the mechanism of strain clock and its relation with the reliable conversion of multiple logic gates are analyzed. The simulation results show that the 3D dynamic model accurately describes the working mechanism of the logic gate. Under the stress of 30 MPa, the logic gate receives the new input and realizes the correct computing function. It is also found that when the strain clock is removed from the central and output nanomagnets in turn, removing the stress on the output nanomagnets in advance will reduce the correct calculation probability of the gate. The delay in removing the stress on the output nanomagnets will reduce the working frequency of the gate. The research results deepen the understanding of the dynamic characteristics of multi-iron selective multi-logic gates and provide important guidance for the design of multi-iron logic circuits.
【作者單位】: 空軍工程大學理學院;
【基金】:國家自然科學基金(批準號:11405270) 空軍工程大學理學院博士后科研啟動基金(批準號:2015BSKYQD03,2016KYMZ06)資助的課題~~
【分類號】:TN791
本文編號:2272039
[Abstract]:A three-dimensional magnetization dynamic model of multi-gate magnets is established, and the dynamic simulation of the multi-logic gate with strain clock (stress or voltage) is carried out. At the same time, the mechanism of strain clock and its relation with the reliable conversion of multiple logic gates are analyzed. The simulation results show that the 3D dynamic model accurately describes the working mechanism of the logic gate. Under the stress of 30 MPa, the logic gate receives the new input and realizes the correct computing function. It is also found that when the strain clock is removed from the central and output nanomagnets in turn, removing the stress on the output nanomagnets in advance will reduce the correct calculation probability of the gate. The delay in removing the stress on the output nanomagnets will reduce the working frequency of the gate. The research results deepen the understanding of the dynamic characteristics of multi-iron selective multi-logic gates and provide important guidance for the design of multi-iron logic circuits.
【作者單位】: 空軍工程大學理學院;
【基金】:國家自然科學基金(批準號:11405270) 空軍工程大學理學院博士后科研啟動基金(批準號:2015BSKYQD03,2016KYMZ06)資助的課題~~
【分類號】:TN791
【相似文獻】
相關期刊論文 前1條
1 陳祥葉;蔡理;王森;張明亮;秦濤;;基于概率模型的擇多邏輯門背景電荷分析[J];微納電子技術;2013年12期
,本文編號:2272039
本文鏈接:http://sikaile.net/kejilunwen/dianzigongchenglunwen/2272039.html
教材專著