【摘要】：本課題是關(guān)于濾波器處理模擬信號的設(shè)計。課題首先詳細介紹了開關(guān)電容電路的工作方式,從典型連續(xù)時間結(jié)構(gòu)的相關(guān)知識進行引入介紹,針對開關(guān)電容電路的剖析和濾波器非理想因素分別加以探討,得到較為實際的解決辦法,最終提出了可行的帶通結(jié)構(gòu)方案:根據(jù)帶通濾波器的帶寬須實現(xiàn)連續(xù)可調(diào)的要求,而且還要達到所需的衰減速度,參考帶內(nèi)紋波等技術(shù)指標選取合適結(jié)構(gòu),由這些核心的指標參數(shù)確定了以級聯(lián)的形式來實現(xiàn)十四階帶通濾波器。結(jié)構(gòu)的確定需要可行性的驗證。在Matlab中進行系統(tǒng)級的建模,確定高通濾波器部分和低通濾波器部分的結(jié)構(gòu),得到相應(yīng)的傳遞函數(shù),通過代碼的形式得到各級的系數(shù),并進行調(diào)整優(yōu)化。整體設(shè)計是差分輸入差分輸出的形式,能夠使輸出范圍較單端形式擴大二倍,而且較為明顯的壓制整個濾波器的共模噪聲。非理想因素的探討主要側(cè)重以下幾點:首先,開關(guān)的導(dǎo)通電阻在系統(tǒng)中引入了熱噪聲,影響信號的傳遞,惡化了帶內(nèi)紋波;其次,版圖設(shè)計得到的電容與仿真參數(shù)不匹配,造成實際的濾波器傳遞函數(shù)變化;最后,實際運放受有限的增益、帶寬和壓擺率的限制,這會影響到積分器的工作性能及精度。按照課題要求,選用級聯(lián)的形式構(gòu)建十四階的開關(guān)電容帶通濾波器,以便達到60dB/倍頻的阻帶衰減速度。根據(jù)由Matlab驗證得到并優(yōu)化的全局系數(shù)以后,進行濾波器的晶體管級電路設(shè)計,晶體管級電路的設(shè)計和仿真采用的是Cadence環(huán)境下的華虹0.35um工藝,完成每一部分的晶體管級設(shè)計及驗證,最終得到整個設(shè)計的版圖結(jié)構(gòu),最后進行版圖的后仿真,驗證整個設(shè)計從理論到實現(xiàn)的正確性。前仿真得到:通帶內(nèi)增益為71.77dB,上升和下降的阻帶衰減速度分別為64.15dB/倍頻和61.73dB/倍頻,帶內(nèi)紋波為最小低至75mdB,滿足設(shè)計要求。在完成版圖以后進行了后仿真,驗證了通帶頻率信號可完整通過。
[Abstract]:This topic is about the filter processing analog signal design. Firstly, the working mode of switched capacitor circuit is introduced in detail, and the related knowledge of typical continuous time structure is introduced. The analysis of switched capacitor circuit and the non-ideal factor of filter are discussed respectively. A practical solution is obtained, and a feasible band-pass structure scheme is put forward: according to the bandwidth of the band-pass filter, the continuous tunable requirement is achieved, and the desired attenuation speed is achieved. According to the technical parameters such as band ripple, the appropriate structure is selected, and the 14th order band-pass filter is implemented by cascading through these core parameters. The determination of the structure requires verification of its feasibility. The system level modeling is carried out in Matlab, the structure of the high pass filter and the low pass filter is determined, the corresponding transfer function is obtained, and the coefficients of each level are obtained by the form of code, and the adjustment and optimization are carried out. The whole design is the form of differential input and differential output, which can enlarge the output range twice as much as the single end form, and obviously suppress the common mode noise of the whole filter. The discussion of non-ideal factors mainly focuses on the following points: first, the on-resistance of the switch introduces thermal noise in the system, which affects the signal transmission, and worsens the in-band ripple; secondly, the capacitance obtained by the layout design does not match the simulation parameters. Finally, the actual operational amplifier is limited by limited gain, bandwidth and swinging rate, which will affect the performance and accuracy of the integrator. According to the requirements of the project, the 14th order switched capacitor bandpass filter is constructed in order to achieve the stopband attenuation speed of 60dB/ frequency doubling. According to the global coefficient verified and optimized by Matlab, the transistor level circuit of filter is designed. The design and simulation of transistor level circuit adopt Huahong 0.35um process under Cadence environment. Finally, the layout structure of the whole design is obtained. Finally, the post-simulation of the layout is carried out to verify the correctness of the whole design from theory to implementation. The results of pre-simulation show that the in-band gain is 71.77 dB, the up and down stopband attenuation speeds are 64.15dB/ doubling and 61.73dB/ doubling respectively, and the band ripple is as low as 75mdB, which meets the design requirements. After completing the layout, a post-simulation is carried out to verify that the passband frequency signal can pass through completely.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN713

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