【摘要】：我國的半導(dǎo)體芯片行業(yè)隨著電子信息技術(shù)的飛速發(fā)展得到了快速的崛起。在半導(dǎo)體芯片生產(chǎn)過程中最重要和最復(fù)雜的制造階段當(dāng)屬半導(dǎo)體晶圓制造系統(tǒng),它具有生產(chǎn)周期長、生產(chǎn)工藝繁雜、生產(chǎn)環(huán)境不確定以及生產(chǎn)方式反復(fù)重入加工的顯著特點(diǎn),并且是多重入、規(guī)模大、多產(chǎn)品、工藝復(fù)雜制造系統(tǒng)的鮮明典范,同時(shí)也是現(xiàn)如今世界上存在的最復(fù)雜的制造系統(tǒng)。因此,對半導(dǎo)體芯片生產(chǎn)廠商來說,如何有效的進(jìn)行半導(dǎo)體晶圓制造系統(tǒng)的瓶頸管理與調(diào)度優(yōu)化來滿足快速變化的市場需求是取得行業(yè)競爭優(yōu)勢的關(guān)鍵所在。半導(dǎo)體晶圓制造系統(tǒng)的瓶頸管理與調(diào)度優(yōu)化問題關(guān)系著企業(yè)實(shí)現(xiàn)縮短加工周期、提高設(shè)備生產(chǎn)率和增加晶圓產(chǎn)品產(chǎn)出量的目標(biāo)實(shí)現(xiàn)。瓶頸管理可以分為瓶頸識別與瓶頸漂移預(yù)測兩方面,它是企業(yè)迫切要解決的問題之一。同樣,調(diào)度優(yōu)化問題是根據(jù)半導(dǎo)體晶圓制造系統(tǒng)的有限資源進(jìn)行合理配置與安排,目的是企業(yè)能滿足客戶需求,從而使自身贏得市場份額、獲得發(fā)展與壯大。本文以半導(dǎo)體晶圓制造系統(tǒng)為研究對象,基于調(diào)控生產(chǎn)過程的思想,對半導(dǎo)體晶圓制造系統(tǒng)的瓶頸管理與調(diào)度優(yōu)化問題做出了研究。首先,瓶頸管理中的瓶頸識別問題主要是對瓶頸識別方法探究。瓶頸概念的非統(tǒng)一性,使得瓶頸識別方法的研究呈現(xiàn)出多樣化特點(diǎn)。本文從設(shè)備與生產(chǎn)系統(tǒng)的角度提出的綜合瓶頸度的判定方法。設(shè)備角度方面給出了設(shè)備固有瓶頸度的識別方法分析,它是在前人研究的基礎(chǔ)上對識別方法進(jìn)行改進(jìn)。生產(chǎn)系統(tǒng)角度是應(yīng)用復(fù)雜網(wǎng)絡(luò)理論的知識對半導(dǎo)體晶圓制造系統(tǒng)進(jìn)行抽象,從而給出了復(fù)雜網(wǎng)絡(luò)設(shè)備瓶頸度的識別方法。綜合瓶頸度是將兩者通過一定的轉(zhuǎn)化提出的一種瓶頸識別的方法。其次,瓶頸管理中的瓶頸漂移預(yù)測問題主要是對模型建立和解析的探究。通過利用半導(dǎo)體晶圓制造系統(tǒng)日常采集的各種設(shè)備數(shù)據(jù),采用基于支持向量機(jī)方法,對系統(tǒng)內(nèi)漂移的瓶頸展開預(yù)測。同時(shí),為了解決支持向量機(jī)中某些參數(shù)擬定的任意性,提出了采用粒子群算法對其進(jìn)行改進(jìn)優(yōu)化,從而保證預(yù)測的準(zhǔn)確可靠。最后,半導(dǎo)體晶圓制造系統(tǒng)的調(diào)度優(yōu)化問題主要是基于充分利用系統(tǒng)瓶頸設(shè)備的思想,提出了綜合投料控制策略和分層工件調(diào)度策略,從而保證晶圓產(chǎn)品在生產(chǎn)過程中使系統(tǒng)的多項(xiàng)性能達(dá)到最優(yōu)。
[Abstract]:With the rapid development of electronic information technology, semiconductor chip industry in China has been rising rapidly. The most important and complex manufacturing stage in semiconductor chip production is semiconductor wafer manufacturing system, which is characterized by long production cycle, complicated production process, uncertain production environment and repeated re-processing of production mode. It is a vivid example of multi-reentry, large scale, multi-product and complex manufacturing system, and it is also the most complex manufacturing system in the world. Therefore, for semiconductor chip manufacturers, how to effectively manage and optimize the bottleneck management and scheduling of semiconductor wafer manufacturing system to meet the rapidly changing market demand is the key to obtain the competitive advantage of the industry. The bottleneck management and scheduling optimization of semiconductor wafer manufacturing system is related to the realization of the goal of shortening the processing cycle, increasing the equipment productivity and increasing the output of wafer products. Bottleneck management can be divided into two aspects: bottleneck identification and bottleneck drift prediction. Similarly, scheduling optimization problem is based on the limited resources of semiconductor wafer manufacturing system reasonable allocation and arrangement, the purpose is that the enterprise can meet the needs of customers, so that it can win market share and gain development and growth. Taking semiconductor wafer manufacturing system as the research object, the bottleneck management and scheduling optimization of semiconductor wafer manufacturing system is studied based on the idea of regulating the production process. First of all, the bottleneck identification problem in bottleneck management is mainly to explore the method of bottleneck identification. Because of the non-unity of the bottleneck concept, the research of the bottleneck identification method presents a variety of characteristics. This paper presents a method for judging the degree of comprehensive bottleneck from the point of view of equipment and production system. In the aspect of equipment angle, the identification method of the inherent bottleneck degree of equipment is analyzed, which is an improvement on the basis of previous research. The angle of production system is to abstract semiconductor wafer manufacturing system by using the knowledge of complex network theory, and the method of identifying bottleneck degree of complex network equipment is given. Comprehensive bottleneck degree is a method to identify bottleneck by transforming them to a certain extent. Secondly, the prediction of bottleneck drift in bottleneck management is mainly about modeling and analysis. Based on the data of semiconductor wafer manufacturing system and support vector machine (SVM), the bottleneck of drift in the system is predicted. At the same time, in order to solve the arbitrariness of some parameters in support vector machine, particle swarm optimization (PSO) algorithm is proposed to improve and optimize it, so as to ensure the accuracy and reliability of prediction. Finally, the scheduling optimization problem of semiconductor wafer manufacturing system is mainly based on the idea of making full use of the bottleneck equipment of the system. A comprehensive feeding control strategy and a layered workpiece scheduling strategy are proposed. In order to ensure that the wafer products in the production process to achieve the optimal performance of the system.
【學(xué)位授予單位】：天津理工大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN305

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