發(fā)布時(shí)間：2018-08-06 13:35

【摘要】：FIR數(shù)字濾波器是數(shù)字信號處理系統(tǒng)中的核心部件,因?yàn)榫哂辛己玫木�性相位特性而在數(shù)字通信圖像處理等領(lǐng)域得到廣泛應(yīng)用。FIR濾波器的設(shè)計(jì)主要可以分為系數(shù)設(shè)計(jì)和結(jié)構(gòu)設(shè)計(jì)兩個(gè)方面。本文從上述兩方面進(jìn)行了 FIR數(shù)字低通濾波器的設(shè)計(jì)工作。FIR濾波器系數(shù)設(shè)計(jì)問題可以抽象成數(shù)學(xué)領(lǐng)域中的多維連續(xù)函數(shù)求最優(yōu)解的問題,所以可以采用遺傳算法進(jìn)行求解。針對傳統(tǒng)遺傳算法存在的容易早熟收斂的問題,本文提出了一種新的改進(jìn)策略,從交叉變異的概率和算子兩方面對算法進(jìn)行改進(jìn),通過測試函數(shù)驗(yàn)證了改進(jìn)策略的可行性,并分別在最小二乘準(zhǔn)則,最大誤差最小化準(zhǔn)則和均方誤差最小化準(zhǔn)則下對FIR濾波器進(jìn)行設(shè)計(jì)。具體地,采用改進(jìn)算法在最小二乘準(zhǔn)則下設(shè)計(jì)的40階FIR濾波器的最小阻帶衰減為39.65dB,而采用螞蟻算法的設(shè)計(jì)結(jié)果為36.85dB,濾波性能提高了 7.6%。傳統(tǒng)的濾波器并行結(jié)構(gòu)中硬件消耗隨并行度線性增加。本文首先采用快速卷積算法減少濾波器并行結(jié)構(gòu)中子濾波器的數(shù)量,在低并行度濾波器的實(shí)現(xiàn)過程中通過采用更多具有對稱系數(shù)的子濾波器來減少電路中的乘法器數(shù)量,同時(shí)將改進(jìn)的低并行度濾波器通過迭代的方式得到高并行度的FIR數(shù)字濾波器。通過改進(jìn)的2并行結(jié)構(gòu)和3并行結(jié)構(gòu)迭代得到的72抽頭的6并行濾波器需要168個(gè)乘法器,與ISCA結(jié)構(gòu)相比少用了 12個(gè)乘法器,表明改進(jìn)結(jié)構(gòu)可以有效減小并行結(jié)構(gòu)的硬件消耗。
[Abstract]:FIR digital filter is the core component of digital signal processing system. The design of Fir filter can be divided into two aspects: coefficient design and structure design because of its good linear phase characteristics and widely used in digital communication image processing and other fields. In this paper, the design work of FIR digital low-pass filter is carried out. The problem of Fir filter coefficient design can be abstracted into the problem of multi-dimensional continuous function in mathematics to find the optimal solution, so genetic algorithm can be used to solve the problem. Aiming at the problem of premature convergence of traditional genetic algorithm, this paper proposes a new improved strategy, which improves the algorithm from the probability of crossover mutation and operator, and verifies the feasibility of the improved strategy by testing function. The FIR filter is designed under the least square criterion, the maximum error minimization criterion and the mean square error minimization criterion respectively. Specifically, the minimum stopband attenuation of the 40 order FIR filter designed by the improved algorithm under the least square criterion is 39.65 dB, while the design result of the ant algorithm is 36.85 dB, the filtering performance is improved by 7.6 dB. The hardware consumption increases linearly with the degree of parallelism in the traditional filter parallel structure. In this paper, the fast convolution algorithm is used to reduce the number of filters with parallel structure, and the number of multipliers in the circuits is reduced by using more sub-filters with symmetric coefficients in the implementation of low parallelism filters. At the same time, the improved low parallelism filter is iterated to obtain the high parallelism FIR digital filter. The improved 2 parallel structure and 3 parallel structure iterative method for 72 tap 6 parallel filters require 168 multipliers, which are less than 12 multipliers compared with the ISCA structure. It shows that the improved structure can effectively reduce the hardware consumption of the parallel structure.
【學(xué)位授予單位】：浙江大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN713.7

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本文編號：2167894