基于SiGe工藝的微波數(shù)控移相器芯片及SoC研究
發(fā)布時(shí)間：2018-08-03 10:47
【摘要】：近年來(lái),大規(guī)模微波毫米波相控陣在軍事雷達(dá)領(lǐng)域得到了迅猛發(fā)展,并將有望成為現(xiàn)代通信方案(例如5G)的組成部分;相控陣能達(dá)到更快的波束形成和更強(qiáng)的干擾抑制,因而具有更好的信噪比和更高的信道容量。這就迫切需要研制出高性能、小型化、可批量生產(chǎn)的移相器芯片以及射頻收發(fā)組件系統(tǒng)級(jí)芯片。傳統(tǒng)上,III-V技術(shù)(InP或GaAs)由于其在輸出功率和噪聲方面的優(yōu)異性能被廣泛采用,卻也存在價(jià)格高、集成度低的問(wèn)題。然而,近年來(lái)BiCMOS工藝在射頻微波領(lǐng)域的快速發(fā)展,使研制出高集成度低成本的移相器芯片和射頻前端SoC成為可能�；诟窳_方德0.13μm SiGe BiCMOS工藝,本文將對(duì)微波數(shù)字移相器芯片以及射頻前端SoC展開(kāi)研究,包括Ku和K波段兩個(gè)6-bit數(shù)控移相器的芯片設(shè)計(jì)以及K波段多功能T/R收發(fā)前端SoC設(shè)計(jì),具體研究結(jié)果如下:采用工藝庫(kù)中具有良好高頻性能和隔離特性的nfetw_rf(深勢(shì)阱場(chǎng)效應(yīng)晶體管),作為移相器中的關(guān)鍵開(kāi)關(guān)器件,設(shè)計(jì)了Ku和K波段兩款6-bit數(shù)控移相器,兩個(gè)無(wú)源移相器均采用級(jí)聯(lián)六個(gè)移相單元的結(jié)構(gòu)。其中的Ku波段移相器工作在15~18GHz頻段內(nèi),可達(dá)到0~360°全相位的移相,最小分辨率為5.625°;移相均方根誤差在全頻帶內(nèi)1.75°;插損為-10.8~-9.3dB,移相附加衰減控制在±0.1~0.8dB之間,VSWR2,輸入功率P_1dB為14.01dBm。而K波段移相器工作在19~24GHz頻段內(nèi),同為6-bit的移相精度;移相RMS error2.60°;插損為-13.8~-11.6dB,移相附加衰減在±0.2~1.1dB之間,VSWR2,輸入功率P_1dB為15.93dBm。這兩款移相器具有高精度、低插損、寬帶寬、高線(xiàn)性度的特點(diǎn)。針對(duì)移相器在SoC中的應(yīng)用,根據(jù)實(shí)驗(yàn)室與國(guó)內(nèi)某單位的合作項(xiàng)目需求,另外設(shè)計(jì)一款K波段全單片式TR收發(fā)組件前端芯片,其中包括波控、電源控制、射頻等單元電路;射頻部分包括上述K波段數(shù)控移相器在內(nèi),同時(shí)集成了低噪放、驅(qū)放、開(kāi)關(guān)、數(shù)控衰減器等單元。此外,為實(shí)現(xiàn)高低溫環(huán)境下系統(tǒng)的噪聲和增益特性,對(duì)放大器引入隨溫度線(xiàn)性變化的電流源進(jìn)行溫度補(bǔ)償,還在系統(tǒng)中單獨(dú)嵌入溫補(bǔ)衰減器模塊。常溫下,19~24GHz頻段內(nèi)仿真結(jié)果表明:接收/發(fā)射通道增益20dB,接收通道噪聲4.6dB,接收通道輸入P_1dB-14.3dBm,發(fā)射通道輸出功率大于12.4dBm,6位移相步進(jìn),移相RMS error2.9°,6位衰減步進(jìn),衰減RMS error0.52dB。
[Abstract]:In recent years, large-scale microwave and millimeter-wave phased arrays have developed rapidly in the field of military radar, and are expected to become part of modern communication schemes (such as 5G), which can achieve faster beamforming and stronger interference suppression. Therefore, it has better signal-to-noise ratio and higher channel capacity. Therefore, it is urgent to develop high performance, miniaturization, batch production phase shifter chip and RF transceiver module system-level chip. Traditional III-V technology (InP or GaAs) is widely used because of its excellent performance in output power and noise, but it also has the problems of high price and low integration. However, with the rapid development of BiCMOS technology in the field of RF and microwave in recent years, it is possible to develop phase shifter chips and RF front-end SoC with high integration and low cost. Based on Grofonde 0.13 渭 m SiGe BiCMOS technology, the microwave digital phase shifter chip and RF front-end SoC are studied in this paper, including the chip design of Ku and K-band 6-bit digital phase shifter and the SoC design of K band multifunction T / R transceiver front end. The results are as follows: nfetw_rf (Deep potential well Field effect Transistor), which has good high frequency performance and isolation property in the process library, is used as the key switch device in the phase shifter. Two 6-bit digital phase shifters are designed, which are Ku and K-band. Both passive phase shifters adopt the structure of cascaded six phase shifters. The Ku-band phase shifter works in the 15~18GHz band, with a minimum resolution of 5.625 擄, a phase-shifting phase shift with a minimum resolution of 5.625 擄, a phase-shift root mean square error of 1.75 擄in the full band, a insertion loss of -10.8 ~ 9.3dB, an additional phase-shift attenuation control between 鹵0.1~0.8dB and an input power of 14.01 dBm. The K-band phase shifter works in the 19~24GHz band, with the same phase shift accuracy of 6-bit; phase shift RMS error2.60 擄; insertion loss of -13.8- 11.6dB. the additional attenuation of phase-shift is between 鹵0.2~1.1dB and VSWR2, and the input power P_1dB is 15.93dBm. These two phase shifters are characterized by high precision, low insertion loss, wide bandwidth and high linearity. Aiming at the application of phase shifter in SoC, according to the requirement of the cooperation project between the laboratory and a certain unit in China, a K band full-chip tr transceiver front-end chip is designed, which includes wave control, power control, radio frequency and so on. The RF part includes the K band digital control phase shifter, and integrates low noise amplifier, drive amplifier, switch, numerical control attenuator and so on. In addition, in order to realize the noise and gain characteristics of the system under high and low temperature, the amplifier introduces a current source with linear variation of temperature to compensate for the temperature, and a temperature compensation attenuator module is embedded separately in the system. The simulation results in 24GHz band show that the gain of receiving / transmitting channel is 20 dB, the noise of receiving channel is 4.6 dB, the input of reception channel is P1dB-14.3 dBm. the output power of transmission channel is more than 12.4dBmH6 displacement step, and the phase shift RMS error2.9 擄-6-bit attenuation step, the attenuation RMS error is 0.52dB.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN623
本文編號(hào)：2161508
[Abstract]:In recent years, large-scale microwave and millimeter-wave phased arrays have developed rapidly in the field of military radar, and are expected to become part of modern communication schemes (such as 5G), which can achieve faster beamforming and stronger interference suppression. Therefore, it has better signal-to-noise ratio and higher channel capacity. Therefore, it is urgent to develop high performance, miniaturization, batch production phase shifter chip and RF transceiver module system-level chip. Traditional III-V technology (InP or GaAs) is widely used because of its excellent performance in output power and noise, but it also has the problems of high price and low integration. However, with the rapid development of BiCMOS technology in the field of RF and microwave in recent years, it is possible to develop phase shifter chips and RF front-end SoC with high integration and low cost. Based on Grofonde 0.13 渭 m SiGe BiCMOS technology, the microwave digital phase shifter chip and RF front-end SoC are studied in this paper, including the chip design of Ku and K-band 6-bit digital phase shifter and the SoC design of K band multifunction T / R transceiver front end. The results are as follows: nfetw_rf (Deep potential well Field effect Transistor), which has good high frequency performance and isolation property in the process library, is used as the key switch device in the phase shifter. Two 6-bit digital phase shifters are designed, which are Ku and K-band. Both passive phase shifters adopt the structure of cascaded six phase shifters. The Ku-band phase shifter works in the 15~18GHz band, with a minimum resolution of 5.625 擄, a phase-shifting phase shift with a minimum resolution of 5.625 擄, a phase-shift root mean square error of 1.75 擄in the full band, a insertion loss of -10.8 ~ 9.3dB, an additional phase-shift attenuation control between 鹵0.1~0.8dB and an input power of 14.01 dBm. The K-band phase shifter works in the 19~24GHz band, with the same phase shift accuracy of 6-bit; phase shift RMS error2.60 擄; insertion loss of -13.8- 11.6dB. the additional attenuation of phase-shift is between 鹵0.2~1.1dB and VSWR2, and the input power P_1dB is 15.93dBm. These two phase shifters are characterized by high precision, low insertion loss, wide bandwidth and high linearity. Aiming at the application of phase shifter in SoC, according to the requirement of the cooperation project between the laboratory and a certain unit in China, a K band full-chip tr transceiver front-end chip is designed, which includes wave control, power control, radio frequency and so on. The RF part includes the K band digital control phase shifter, and integrates low noise amplifier, drive amplifier, switch, numerical control attenuator and so on. In addition, in order to realize the noise and gain characteristics of the system under high and low temperature, the amplifier introduces a current source with linear variation of temperature to compensate for the temperature, and a temperature compensation attenuator module is embedded separately in the system. The simulation results in 24GHz band show that the gain of receiving / transmitting channel is 20 dB, the noise of receiving channel is 4.6 dB, the input of reception channel is P1dB-14.3 dBm. the output power of transmission channel is more than 12.4dBmH6 displacement step, and the phase shift RMS error2.9 擄-6-bit attenuation step, the attenuation RMS error is 0.52dB.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2017
【分類(lèi)號(hào)】：TN623
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