【摘要】：場效應(yīng)晶體管在微電子領(lǐng)域,其結(jié)構(gòu)和制作工藝,都有顯著的特點,是集成芯片的基本組成單元。將它應(yīng)用于生物電生理特性的研究,早在上個世紀六十年代就開始了。本文對神經(jīng)信號讀取場效應(yīng)管的工藝仿真和器件模型仿真做了初步嘗試,完成的主要工作有以下內(nèi)容:首先,深入研究神經(jīng)信號讀取場效應(yīng)晶體管工作原理,依據(jù)傳統(tǒng)場效應(yīng)管的基本特性,分析了生物敏場效應(yīng)管的特性,參照離子敏場效應(yīng)管的結(jié)構(gòu),建立了“電解質(zhì)—傳感器介質(zhì)層—金屬—器件柵介質(zhì)—導(dǎo)電溝道”的生物敏場效應(yīng)晶體管整體器件模型;其次,改進傳統(tǒng)場效應(yīng)晶體管的結(jié)構(gòu),引入“微井”結(jié)構(gòu),增強神經(jīng)元與生物敏場效應(yīng)管之間連接緊密度,以期實現(xiàn)選擇性的激勵和測量神經(jīng)元細胞的電信號;再者,根據(jù)所設(shè)計的器件的結(jié)構(gòu),采用CMOS工藝,利用Silvaco來進行整個工藝流程的仿真,在抽取出器件工藝參數(shù)后,對所得到的器件進行基本特性的仿真。在本論文中,主要對神經(jīng)信號讀取場效應(yīng)管的PMOS管以及后端工藝進行了仿真。在PMOS的工藝仿真流程中,借助Silvaco的Athena模塊,我們可以提取仿真所得的PMOS的許多參數(shù)出來,主要參數(shù)包括源/漏極結(jié)深,閾值電壓,柵氧化層的厚度,源/漏極方塊電阻,LDD方塊電阻等。利用Silvaco的Utmost模塊,我們提取出所建立的MOS的BSIM3模型出來,為后面建立的等效電路中的MOS管提供模型參數(shù),同樣也為后續(xù)的放大電路的設(shè)計提供了技術(shù)指標及要求。
[Abstract]:In the field of microelectronics, the structure and fabrication process of field-effect transistors (FET) have remarkable characteristics, and they are the basic components of integrated chips. The application of it to the study of bioelectrophysiological properties began in the 1960 s. In this paper, the process simulation of neural signal reading FET and the device model simulation are made a preliminary attempt. The main work accomplished is as follows: firstly, the principle of neural signal reading FET is deeply studied. According to the basic characteristics of the conventional FET, the characteristics of the biosensitive FET are analyzed, and the structure of the ion-sensitive FET is referred to. The whole device model of biosensitive field-effect transistor (FET) with "electrolyte-sensor dielectric layer, metal-device gate dielectric-conductive channel" is established. Secondly, the structure of traditional FET is improved and the "microwell" structure is introduced. Enhance the tightness of the connection between the neuron and the biosensitive FET in order to achieve selective excitation and measurement of the electrical signals of the neuronal cell; furthermore, according to the structure of the device designed, the CMOS process is used. Silvaco is used to simulate the whole process. After extracting the process parameters of the device, the basic characteristics of the device are simulated. In this thesis, the PMOS and back-end process of neural signal reading FET are simulated. In the process simulation of PMOS, with the help of Silvaco's Athena module, we can extract many parameters from the simulation. The main parameters include source / drain junction depth, threshold voltage, thickness of gate oxide, etc. Source / drain block resistance LDD block resistance etc. Using the most module of Silvaco, we extract the BSIM3 model of MOS, which provides the model parameters for the MOS transistor in the subsequent equivalent circuit, and also provides the technical specifications and requirements for the subsequent design of the amplifier circuit.
【學(xué)位授予單位】：華中科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN386

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