【摘要】：砷化鎵(GaAs)基單片微波集成電路性能優(yōu)異、可靠性高,得到廣泛應(yīng)用。微波成像、無線通信、雷達(dá)探測、射電天文等領(lǐng)域的迅速發(fā)展,對微波電路的小型化、高性能、低功耗等方面的要求不斷提高。單片低噪聲放大器(LNA)作為接收機(jī)的第一級有源電路,其性能對接收機(jī)的噪聲和靈敏度至關(guān)重要。本文對工藝模型進(jìn)行了研究,并對電感、電容進(jìn)行模型參數(shù)提取和驗(yàn)證。在模型研究的基礎(chǔ)上,利用0.18μm砷化鎵PHEMT工藝,設(shè)計(jì)了一款Ku波段單片低噪聲放大器,該LNA為三級級聯(lián)拓?fù)浣Y(jié)構(gòu)。采用自偏置技術(shù),以方便芯片測試及使用。低噪放第一級采用源極負(fù)反饋技術(shù),使最佳噪聲阻抗和輸入共軛匹配阻抗更接近,同時(shí)提高電路的穩(wěn)定性。低噪放后兩級采用并聯(lián)反饋技術(shù),以改善低噪放的增益平坦度。電路的輸入匹配網(wǎng)絡(luò)滿足最佳噪聲匹配并保證良好的端口駐波比,級間匹配網(wǎng)絡(luò)將前級的輸出與后級的輸入直接匹配,有效減小了芯片面積,輸出匹配網(wǎng)絡(luò)將輸出級匹配到50歐姆,以利于芯片在模塊中使用。文中用到的無源器件模型研究方法及電路設(shè)計(jì)技術(shù)可為LNA設(shè)計(jì)提供參考。版圖仿真結(jié)果表明,在12-18 GHz頻段內(nèi),該LNA噪聲系數(shù)低于2.2 dB,增益為25.7±0.5 dB,輸入輸出駐波比小于1.8,以上指標(biāo)可滿足點(diǎn)對點(diǎn)通信、相控陣?yán)走_(dá)等應(yīng)用。
[Abstract]:Gallium arsenide (GaAs)-based monolithic microwave integrated circuits are widely used for their excellent performance and high reliability. With the rapid development of microwave imaging, wireless communication, radar detection, radio astronomy and so on, the requirements of microwave circuits such as miniaturization, high performance and low power consumption have been raised. As the first stage active circuit of receiver, the performance of monolithic low noise amplifier (LNA) is very important to the noise and sensitivity of receiver. In this paper, the process model is studied, and the model parameters of inductance and capacitance are extracted and verified. Based on the model study, a Ku band monolithic low noise amplifier is designed using 0.18 渭 m GaAs pHEMT process. The LNA is a three-stage cascade topology. Adopt self-bias technology to facilitate chip test and use. In the first stage of the low noise amplifier, the source negative feedback technique is used to make the optimal noise impedance and the input conjugate matching impedance closer to each other, and the stability of the circuit is improved at the same time. In order to improve the gain flatness of low noise amplifier, parallel feedback technique is used in the two stages after low noise amplifier. The input matching network of the circuit satisfies the optimal noise matching and ensures a good standing wave ratio of ports. The interstage matching network directly matches the output of the front stage with the input of the next stage, which effectively reduces the chip area. The output matching network matches the output level to 50 ohms to facilitate the chip to be used in the module. The research method of passive device model and circuit design technology used in this paper can provide reference for LNA design. The layout simulation results show that the LNA noise coefficient is less than 2.2 dB, the gain is 25.7 鹵0.5 dB and the input / output VSWR is less than 1.8 in the 12-18 GHz band. The above parameters can meet the requirements of point-to-point communication, phased array radar and so on.
【學(xué)位授予單位】：合肥工業(yè)大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN722.3

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