硅基E波段差分低噪聲放大器研究與設計
發(fā)布時間:2018-07-04 14:34
本文選題:CMOS + E波段 ; 參考:《華東師范大學》2015年碩士論文
【摘要】:毫米波頻段(30-300GHz)的無線通信由于其超大的帶寬,較高的安全性和抗干擾能力得到了廣泛的發(fā)展,其中E-band頻段相對于傳統(tǒng)微波頻段有著更加豐富的頻譜資源、更高的傳輸速率以及更遠的傳輸距離,近些年來成為學術界和工業(yè)領域的熱點研究對象。硅基CMOS工藝的高頻特性隨著其特征尺寸的逐漸變小而變得越來越好,加上工藝成本低,集成度高等優(yōu)點,從而越來越多的被使用到毫米波集成電路的設計中。本文基于65nm RFCMOS工藝,設計了兩款用于E-band (71-76GHz81-86GHz)無線通信接收機前端的全集成低噪聲放大器,主要的研究內(nèi)容如下:1、通過對近些年來國內(nèi)外毫米波低噪聲放大器電路設計的調(diào)研總結,可以得出:毫米波低噪聲放大器設計中常用的電路結構一般為單端或差分的源端電感負反饋的共源共柵結構;基本性能指標參數(shù)為電源電壓1.5V左右、增益約為15dB、噪聲系數(shù)6dB左右、輸入輸出反射系數(shù)小于-10dB。2、采用ADS Momentum對電路所使用無源器件,如片上螺旋電感、變壓器以及變壓器巴倫進行了仿真建模,其中所設計的片上螺旋電感的自諧振頻率大于350GHz,品質因子Q在所工作的頻段內(nèi)大于16;進行級間耦合的變壓器采用的是1:1的垂直耦合結構,在工作頻段內(nèi)S21小于-2dB。3、改變MOS管的偏置條件,對MOS管噪聲系數(shù)和截止頻率進行研究,從仿真結果中可以得出MOS管的電流密度偏置在0.15 mA/μm左右時,可以獲得最優(yōu)的噪聲系數(shù),電流密度偏置在0.3 mA/μm左右時,MOS管的截止頻率最大;放大器電路采用偽差分結構以提高電路對共模干擾的抑制,其中傳統(tǒng)共源共柵電路結構引入了級間電感以提升電路的頻率響應特性,共柵管的柵端也添加了串聯(lián)電阻以增強電路的穩(wěn)定性;在有源器件MOSFET的版圖的設計中盡量減小柵端、源端以及漏端金屬連線之間的重疊部分以減小寄生電容,MOSFET版圖設計后仿真值的fT為160GHz、fmax為406GHz,與器件模型前仿值相近。4、電路設計采用“場”、“路”協(xié)同仿真方法:因為高頻時,電路的寄生效應變得更加嚴重,所以開始設計電路時就需要考慮到各種寄生效應的影響;電路的整體版圖由有源模塊的版圖和無源模塊的版圖無縫拼接而成,將有源器件MOSFET版圖抽出寄生,然后和電磁場仿真出的無源器件S參數(shù)一同帶入到電路仿真中去,這樣就可以考慮到有源模塊和無源模塊中的所有寄生,以便獲得更加精確的仿真結果。5、總結出適用于CMOS毫米波頻段的共源共柵源級電感負反饋結構低噪聲放大器電路的設計方法:首先設置好每一級電路的最佳靜態(tài)工作點;然后確定好晶體管的尺寸、完成版圖繪制和寄生抽;最后實現(xiàn)輸入輸出阻抗匹配。6、基于65nm RFCMOS工藝,設計了兩款工作頻段分別為71~76GHz和81~86GHz的三級偽差分結構低噪聲放大器;在1.5V電源電壓下,71~76GHz頻段的低噪聲放大器的后仿結果為:增益S21大于16dB、噪聲系數(shù)NF小于7dB、輸入輸出反射損耗均小于-10dB、輸入1dB壓縮點為-17.5dBm; 81~86GHz頻段的放大器的后仿結果為:增益S21大于15dB、噪聲系數(shù)NF小于8dB、輸入輸出反射損耗均小于-10dB、輸入1dB壓縮點為-16.79dBm。本論文研究受上海市科委“科技創(chuàng)新行動計劃”《E-band超高速無線通信毫米波信號源芯片技術研究》(13511500702)資助。
[Abstract]:The wireless communication of millimeter wave band (30-300GHz) has been widely developed because of its high bandwidth, high security and anti-interference ability, in which the E-band band has more abundant spectrum resources, higher transmission rate and farther transmission distance compared with the traditional microwave band, which has become an academic and industrial field in recent years. The high frequency characteristics of the silicon based CMOS process become better and better with its smaller feature size, with the advantages of low process cost and high integration, so more and more are used in the design of millimeter wave integrated circuits. Based on the 65nm RFCMOS technology, two types are designed for E-band (71-76GHz81-86GHz). The main research contents are as follows: 1. By summarizing the research on the design of the millimeter wave low noise amplifier in recent years, it can be concluded that the common circuit structure commonly used in the design of the millimeter wave low noise amplifier is the negative feedback of the single or differential source inductors. The common gate structure, the basic performance parameter is about 1.5V of power supply voltage, the gain is about 15dB, the noise coefficient is about 6dB, the input and output reflection coefficient is less than -10dB.2, using ADS Momentum to simulate the passive devices used in the circuit, such as on chip spiral inductor, transformer and transformer balun. The self resonant frequency of the rotating inductor is greater than 350GHz, and the quality factor Q is more than 16 in the working frequency band. The transformer with interstage coupling is the vertical coupling structure of 1:1. The S21 is less than -2dB.3 in the working band, and the bias condition of the MOS tube is changed. The noise coefficient and cut-off frequency of the MOS tube are studied, and M can be obtained from the simulation results. When the current density of the OS tube is biased at about 0.15 mA/ m, the optimal noise coefficient can be obtained. The cut-off frequency of the MOS tube is the largest when the current density is biased at about 0.3 mA/ mu m. The amplifier circuit uses the Pseudo differential structure to improve the suppression of the common mode interference. The traditional common source common gate circuit introduces the interstage inductance to improve the current density. The frequency response characteristic of the circuit, the gate end of the common gate also adds series resistance to enhance the stability of the circuit. In the design of the layout of the active device MOSFET, the overlap between the gate end, the source end and the leakage end metal connection is minimized to reduce the parasitic capacitance. The fT of the simulation value of the MOSFET layout is 160GHz, Fmax is 406GHz, and the device is used. The pre imitation value of the model is similar to.4. The circuit design adopts the "field" and "road" cooperative simulation method. Because the parasitic effect of the circuit becomes more serious because of the high frequency, the influence of various parasitic effects should be taken into account when the circuit is designed. The overall layout of the circuit is seamlessly spliced by the layout of the active module and the layout of the passive module. In addition, the active component MOSFET layout is extracted and parasitized, and then the S parameters of the passive device are brought into the circuit simulation with the EMF emulation. In this way, all the parasites in the active module and the passive module can be taken into account in order to obtain more accurate simulation results,.5, and the common source common grid source suitable for the CMOS millimeter wave band is obtained. The design method of the low noise amplifier circuit of the stage inductance negative feedback structure: first set the best static working point of each level circuit, then determine the size of the transistor, complete the layout and parasitic extraction; finally, realize the input and output impedance matching.6, based on the 65nm RFCMOS process, the two work bands are designed to be 71 to 76GH, respectively. Z and 81 to 86GHz three stage Pseudo differential structure low noise amplifier; under 1.5V power supply voltage, the result of low noise amplifier of 71 ~ 76GHz frequency band is: gain S21 is greater than 16dB, noise coefficient NF is less than 7dB, input and output reflection loss is less than -10dB, input 1dB compression point is -17.5dBm; 81 ~ 86GHz frequency amplifier's post imitation result In addition, the gain S21 is greater than 15dB, the noise coefficient NF is less than 8dB, the input and output reflection loss is less than -10dB, and the input 1dB compression point is -16.79dBm. this paper is funded by the research of the technology innovation action plan of Shanghai science and Technology Commission of
【學位級別】:碩士
【學位授予年份】:2015
【分類號】:TN722.3
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