本文選題：便攜式 + DDS��； 參考：《華中師范大學(xué)》2015年碩士論文

【摘要】：信號(hào)源是科學(xué)實(shí)驗(yàn)和工程界最常用的測(cè)試測(cè)量?jī)x器之一,廣泛應(yīng)用于通信、雷達(dá)和軍事等領(lǐng)域,對(duì)各種高性能信號(hào)源研究至今仍然是儀器行業(yè)中的熱點(diǎn)。而數(shù)字化直接頻率合成技術(shù),即DDS(Direct Digital Synthesis),以其頻率分辨率高、頻率響應(yīng)速度快以及相位連續(xù)等優(yōu)點(diǎn),廣泛應(yīng)用于高性能信號(hào)源的研究中。目前,市場(chǎng)上DDS信號(hào)源幾乎都是臺(tái)式信號(hào)源,而臺(tái)式信號(hào)源功耗高、體積大且不便攜帶。為滿足部隊(duì)野外作業(yè)、車載移動(dòng)平臺(tái)等對(duì)信號(hào)源的特殊要求,受江蘇綠揚(yáng)電子儀器集團(tuán)有限公司所托,研究開發(fā)一種低功耗便攜式DDS信號(hào)源。低功耗便攜式DDS信號(hào)源研發(fā)的主要技術(shù)問題是選擇合適的低功耗DDS信號(hào)產(chǎn)生方案。本文在研究分析了現(xiàn)有DDS技術(shù)方案的基礎(chǔ)上,提出了采用STM32控制DAC5686專用芯片的低功耗方案。該芯片的低功耗是靠低工作電壓實(shí)現(xiàn)的,因此,必須采用高效多路開關(guān)電源供電系統(tǒng)。然而,開關(guān)電源又嚴(yán)重影響信號(hào)源要求的模擬小信號(hào)輸出。為解決這一問題,本文在電源完整性和信號(hào)完整性方面也做了大量的研究。論文詳細(xì)分析了目前主流的FPGA控制高速D/A轉(zhuǎn)換器及傳統(tǒng)的DDS專用集成電路的DDS信號(hào)源技術(shù)解決方案。分析了各自的功率消耗,估算了基于DAC5686芯片的DDS信號(hào)源整機(jī)供電電壓、電流及電源效率,介紹了相關(guān)硬件電路的設(shè)計(jì),并對(duì)關(guān)鍵的濾波電路進(jìn)行了仿真。論文還詳盡地闡述了該DDS信號(hào)源的控制軟件和人機(jī)界面的設(shè)計(jì)思想,并繪出了軟件流程圖。論文最后對(duì)DDS信號(hào)源整機(jī)進(jìn)行了測(cè)試,結(jié)果顯示該信號(hào)源采樣率高達(dá)310MSa/s,模擬帶寬達(dá)120MHz,最小輸出信號(hào)達(dá)10mVpp,且功耗僅為2.25W,并可輸出多種調(diào)制波,滿足用戶提出的技術(shù)指標(biāo)要求。
[Abstract]:Signal source is one of the most commonly used measurement instruments in the field of science experiment and engineering. It is widely used in the fields of communication radar and military and so on. The research on various high performance signal sources is still a hot spot in the instrument industry. Digital direct frequency synthesis (DDS) is widely used in the research of high performance signal sources due to its advantages of high frequency resolution, fast frequency response and continuous phase. At present, almost all DDS signal sources in the market are desktop signal sources, while desktop signal sources have high power consumption, large volume and inconvenient to carry. In order to meet the special requirements of the field operation and the on-board mobile platform, a low-power portable DDS signal source was developed by Jiangsu Luyang Electronic instrument Group Co., Ltd. The main technical problem of low power portable DDS signal source is to select suitable low power DDS signal generation scheme. Based on the research and analysis of the existing DDS technology, this paper proposes a low power scheme using STM32 to control the DAC5686 chip. The low power consumption of the chip is realized by low working voltage. Therefore, it is necessary to adopt an efficient switching power supply system. However, the switching power supply seriously affects the analog small signal output required by the signal source. In order to solve this problem, this paper has done a lot of research on power integrity and signal integrity. This paper analyzes the current mainstream FPGA control high speed D / A converter and traditional DDS ASIC DDS signal source technology solutions. The power consumption of DDS signal generator based on DAC5686 is analyzed, the supply voltage, current and power efficiency of DDS signal source are estimated, the design of related hardware circuit is introduced, and the key filter circuit is simulated. The control software of the DDS signal source and the design idea of the man-machine interface are described in detail, and the flow chart of the software is given. Finally, the DDS signal generator is tested. The results show that the sampling rate of the DDS signal source is as high as 310 Ma / s, the analog bandwidth is 120 MHz, the minimum output signal is 10 mVppand the power consumption is only 2.25W, and it can output various modulation waves, which can meet the technical requirements proposed by the user.
【學(xué)位授予單位】：華中師范大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN741

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本文編號(hào)：2093766