本文選題：MOSFET + 應(yīng)變硅��； 參考：《電子科技大學(xué)》2015年碩士論文

【摘要】：在Moore定律的推動(dòng)下,晶體管尺寸逐漸縮小,集成電路集成度越來(lái)越高,當(dāng)特征尺寸進(jìn)入到納米量級(jí),晶體管性能會(huì)受到小尺寸效應(yīng)的影響。包括SiGe材料在內(nèi)的應(yīng)變Si技術(shù),以其諸多優(yōu)點(diǎn)成為現(xiàn)階段保持Moore定律、同時(shí)提升器件性能的新材料技術(shù)。SiGe虛擬襯底主要是通過(guò)SiGe與Si材料間的晶格失配在溝道中引入應(yīng)變。因而要實(shí)現(xiàn)性能優(yōu)良的應(yīng)變Si/SiGe器件需要制備出高質(zhì)量的弛豫SiGe薄膜。良好的SiGe虛擬襯底要有高弛豫度、低缺陷密度、低表面粗糙度以及較薄的厚度,但這幾項(xiàng)指標(biāo)之間互有影響甚至互相對(duì)立。為了獲得高質(zhì)量且薄的SiGe虛擬襯底,本論文通過(guò)對(duì)SiGe合金材料應(yīng)變弛豫機(jī)理的研究,設(shè)計(jì)出制備超薄SiGe虛擬襯底的方案并成功制備,并針對(duì)離子注入致超薄SiGe虛擬襯底應(yīng)變弛豫的過(guò)程構(gòu)建模型。本論文從SiGe和Si的晶格失配入手,闡明了SiGe中應(yīng)變產(chǎn)生的原因;通過(guò)分析SiGe中應(yīng)變弛豫與SiGe/Si界面處失配位錯(cuò)的關(guān)系,解釋了SiGe外延薄膜應(yīng)變弛豫的機(jī)理,給出了常見(jiàn)的臨界厚度模型。本論文在研究位錯(cuò)與應(yīng)變弛豫關(guān)系的基礎(chǔ)上,結(jié)合SiGe合金的制備技術(shù)及常見(jiàn)的虛擬襯底的實(shí)現(xiàn)方法,設(shè)計(jì)出兩種超薄SiGe虛擬襯底制備方案,經(jīng)對(duì)比選擇后采用Ar+離子注入的方案。針對(duì)此方案設(shè)計(jì)實(shí)驗(yàn)條件并成功制備出厚度僅為200nm的超薄SiGe虛擬襯底;同時(shí)研究了虛擬襯底的測(cè)試表征技術(shù),對(duì)制備成功的超薄虛擬襯底進(jìn)行測(cè)試、計(jì)算及分析,結(jié)果表明虛擬襯底的Ge含量為19.93%,弛豫度高達(dá)81.51%。本論文針對(duì)離子注入致超薄SiGe虛擬襯底應(yīng)變弛豫的過(guò)程進(jìn)行了建模。針對(duì)彈性多層薄膜系統(tǒng),本文在已有的熱應(yīng)力失配模型的基礎(chǔ)上,建立了由晶格失配引起的多層薄膜系統(tǒng)的應(yīng)變分布物理模型,并推導(dǎo)出了其解析表達(dá)式;并進(jìn)一步考慮到離子注入所導(dǎo)致的空位缺陷,將其納入到多層薄膜系統(tǒng)的應(yīng)變分布模型中,給出了離子注入所致的空位缺陷密度與弛豫度之間的解析關(guān)系式;將此模型應(yīng)用的Si/SiGe雙層系統(tǒng)構(gòu)成的虛擬襯底中,得到了與實(shí)驗(yàn)數(shù)據(jù)較好的吻合。另外,本章探討了Ar+離子注入后在材料中的分布對(duì)SiGe中楊氏模量的影響,由此出發(fā)構(gòu)建了數(shù)值模型。
[Abstract]:Driven by Moore's law, the size of transistors shrinks and the integration of integrated circuits becomes more and more high. When the characteristic size reaches the nanometer level, the performance of transistors will be affected by the small size effect. Strained Si technology, including SiGe materials, has become the Moore's law at present because of its many advantages. At the same time, the new material technology. SiGe virtual substrate is introduced strain into the channel by lattice mismatch between SiGe and Si material. Therefore, it is necessary to fabricate high quality relaxation SiGe thin films in order to achieve high performance strained Si / SiGe devices. A good SiGe virtual substrate should have high relaxation, low defect density, low surface roughness and thin thickness. In order to obtain high quality and thin SiGe virtual substrate, in this paper, the strain relaxation mechanism of SiGe alloy material is studied, and the scheme of fabricating ultra-thin SiGe virtual substrate is designed and successfully prepared. A model for strain relaxation of ultra-thin SiGe virtual substrate induced by ion implantation was established. Starting with the lattice mismatch of SiGe and Si, the causes of strain generation in SiGe are explained, and the mechanism of strain relaxation in SiGe epitaxial film is explained by analyzing the relationship between strain relaxation in SiGe and mismatch dislocation at SiGe / Si interface. The common critical thickness model is given. Based on the study of the relationship between dislocation and strain relaxation, two kinds of ultra-thin SiGe virtual substrates are designed by combining the fabrication technology of SiGe alloy and the realization of common virtual substrates. Ar ion implantation was used after comparison and selection. According to this scheme, the experimental conditions were designed and the ultra-thin SiGe virtual substrates with thickness of only 200nm were successfully fabricated, and the testing and characterization technology of the virtual substrates was studied, and the ultra-thin virtual substrates were tested, calculated and analyzed. The results show that the GE content of the virtual substrate is 19.93 and the relaxation degree is up to 81.51. In this paper, the strain relaxation process of ultra-thin SiGe substrates induced by ion implantation is modeled. Based on the existing thermal stress mismatch model, the strain distribution physical model of the multilayer thin film system caused by lattice mismatch is established, and its analytical expression is derived. Furthermore, considering the vacancy defect caused by ion implantation, it is incorporated into the strain distribution model of multilayer thin film system, and the analytical relationship between the vacancy defect density and the relaxation degree caused by ion implantation is given. In the virtual substrate constructed by the Si-SiGe bilayer system which is applied to this model, the experimental data are in good agreement with each other. In addition, the effect of ar ion implantation on Young's modulus in SiGe is discussed, and a numerical model is constructed.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN304.2

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相關(guān)期刊論文 前1條

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本文編號(hào)：2030748