本文選題：頻率源 + 鎖相環(huán)　； 參考：《電子科技大學(xué)》2015年碩士論文

【摘要】：微波頻率源是當(dāng)今現(xiàn)代電子系統(tǒng)的核心部件之一,很多現(xiàn)代電子系統(tǒng)的性能好壞直接依賴于微波頻率源的指標(biāo)。所以設(shè)計高性能的微波頻率源是現(xiàn)代電子技術(shù)中一個重要的研究方向。本文課題來源是某雷達(dá)系統(tǒng)的收發(fā)組件項目,需要我們設(shè)計多路微波頻率源以滿足收發(fā)模塊對多路本振信號的需求。多路微波頻率源具體分為兩部分:其一是提供多路固定頻點間切換輸出信號的多路鎖相頻率源,另一個則是提供捷變頻率信號的多路快速跳頻源。多路鎖相頻率源中包括了超過20個鎖相點頻源,其中部分點頻源通過開關(guān)電路切換輸出,輸出的點頻中最低的頻率是2GHz,頻率最高的12.4GHz。多路快速跳頻源則通過DDS+PLL混合頻率合成方案實現(xiàn)4路在C波段的快速跳頻輸出。本文首先對頻率合成技術(shù)進(jìn)行了概述并介紹了頻率源發(fā)展現(xiàn)狀,簡單說明課題所涉及的頻率合成技術(shù)技術(shù)的理論知識,包括PLL與DDS各自的電路結(jié)構(gòu),性能指標(biāo)及相位噪聲或雜散分析。接著,本文詳細(xì)闡述了多路鎖相頻率源的設(shè)計過程。首先,給出了系統(tǒng)框圖,以及對器件的選擇。其次介紹了環(huán)路濾波器和單片機(jī)控制模塊的設(shè)計,給出了具體的環(huán)路仿真和寄存器配置實例。然后介紹了整個多路鎖相頻率源系統(tǒng)的電源模塊和開關(guān)控制模塊的設(shè)計過程。隨后,本文又介紹了多路快速跳頻源的設(shè)計。通過對當(dāng)前DDS和PLL混合頻率合成的分析,確定了快速跳頻源采用DDS先倍頻再與PLL混頻的方案。分別對方案中時鐘信號的產(chǎn)生模塊、DDS模塊、倍頻鏈路、本振以及混頻輸出模塊各個主要部分的設(shè)計做了闡述。最終本文分別給出多路鎖相頻率源與多路快速跳頻源各自的電路實物與測試結(jié)果,測試結(jié)果滿足預(yù)期指標(biāo),并對調(diào)試中出現(xiàn)的一些問題做了說明。
[Abstract]:Microwave frequency source is one of the core components of modern electronic system. The performance of many modern electronic systems depends directly on the index of microwave frequency source. Therefore, the design of high-performance microwave frequency source is an important research direction in modern electronic technology. The source of this thesis is the transceiver module of a radar system. We need to design a multi-channel microwave frequency source to meet the needs of the transceiver module for the multi-channel local oscillator signal. The multi-channel microwave frequency source is divided into two parts: one is to provide a multi-channel phase-locked frequency source for switching output signals between multiple fixed frequency points, the other is to provide a multi-channel fast frequency hopping source for agile frequency signals. The multi-channel phase-locked frequency source includes more than 20 phase-locked point frequency sources, some of which switch output through switching circuit. The lowest frequency of the output point frequency is 2GHz, and the highest frequency is 12.4 GHz. The multi-channel fast frequency hopping (FH) source is realized by the DDS PLL hybrid frequency synthesis scheme, and four fast FH outputs in C band are realized. In this paper, the frequency synthesis technology is summarized and the current development of frequency source is introduced. The theoretical knowledge of frequency synthesis technology, including the circuit structure of PLL and DDS, is briefly explained. Performance index and phase noise or stray analysis. Then, the design process of multi-channel phase-locked frequency source is described in detail. First, the system block diagram and the selection of the device are given. Secondly, the design of loop filter and single chip microcomputer control module is introduced, and the loop simulation and register configuration examples are given. Then the design process of the power module and switch control module of the multi-channel phase-locked frequency source system is introduced. Then, this paper introduces the design of multi-channel fast frequency hopping source. Based on the analysis of the current hybrid frequency synthesis of DDS and PLL, the scheme of fast frequency hopping source using DDS first frequency doubling and then mixing with PLL is determined. The design of DDS module, frequency doubling link, local oscillator and mixing output module are described respectively. In the end, the paper gives the actual circuit and test results of multi-channel phase-locked frequency source and multi-channel fast frequency hopping source respectively, and the test results meet the expected targets, and some problems in debugging are explained.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN74

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 任鵬;周資偉;朱江;;一種基于DDS和PLL技術(shù)本振源的設(shè)計與實現(xiàn)[J];現(xiàn)代電子技術(shù);2009年09期

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本文編號：1968633