本文選題：模擬電路設計 + 模擬IP　； 參考：《杭州電子科技大學》2017年碩士論文

【摘要】：目前,在集成電路和系統(tǒng)的設計中基于IP核的設計已得到廣泛應用。IP核通常被分為硬核、軟核和固核。對數(shù)字電路,三種類型的IP核都已得到廣泛應用。但對于模擬電路,由于其設計自動化水平較低,所以當前廣泛應用的只有硬核,即經(jīng)工藝流片驗證通過的設計版圖。這只有當該IP核的各種性能參數(shù)要求與設計者的應用需求完全匹配時才可行,否則,就無法利用這樣的硬核。為了實現(xiàn)模擬電路更廣泛意義上的基于IP的設計,需要研究當應用需求或工藝條件發(fā)生變化時,如何從已完成的一個具體電路設計出發(fā),通過設計參數(shù)的改變,即resizing,盡快得到新的設計。本文研究的即是如何將一個在某一工藝線上已設計好的電路模塊,在保持主要性能指標基本不變的要求下,通過resizing移植到新的工藝。文章的主要工作是提出了運算放大器電路設計重用的一種新方法。與文獻中已有的工作類似,方法的基本思想是設法匹配移植前后電路的工作電流和部分MOS管的小信號跨導gm、輸出電導gds,從而保證關鍵的電路性能指標不變,不同的是具體實現(xiàn)匹配的方法。本文采用的是通過求解基于BSIM模型的溝道電流、跨導與輸出電導匹配方程的方法,克服了現(xiàn)有方法中由于采用不準確模型存在誤差的問題。文章給出了Miller補償兩級運算放大器、單端輸出折疊式共源共柵放大器、及帶共模反饋的全差分折疊式共源共柵放大器等電路從0.35μm工藝到0.18μm工藝的移植實例,通過移植前后MOS管的參數(shù)及電路性能指標的比較,證明了本文設計重用方法的可行性與有效性。
[Abstract]:At present, the design based on IP core has been widely used in the design of integrated circuits and systems. The IP core is usually divided into hard core, soft core and fixed core. For digital circuits, three types of IP cores have been widely used. However, for analog circuits, due to their low level of design automation, only the hard core is widely used, that is, the design layout verified by the process flow sheet. This is only feasible if the various performance parameters of the IP core are exactly matched with the application requirements of the designer, otherwise, such a hard core cannot be utilized. In order to realize the design based on IP in the broader sense of analog circuit, it is necessary to study how to change the design parameters from a specific circuit design that has been completed when the application requirements or process conditions change. That is, resizing, as soon as possible to get a new design. In this paper, we study how to transplant a circuit module which has been designed on a certain process line to a new process through resizing under the requirement of keeping the main performance index unchanged. The main work of this paper is to put forward a new method of design reuse of operational amplifier circuit. The basic idea of the method is to match the current of the circuit before and after the transplant and the small signal transconductance of some MOS transistors to output conductance GDP, so as to ensure that the key circuit performance indexes remain unchanged. What is different is the concrete realization matching method. In this paper, by solving the channel current, transconductance and output conductance matching equations based on BSIM model, we overcome the error problem of the existing methods because of the inaccurate model. Examples of Miller compensation two-stage operational amplifier, single-end output foldable common-gate amplifier and fully differential foldable common-gate amplifier with common-mode feedback from 0.35 渭 m process to 0.18 渭 m process are given in this paper. By comparing the parameters and circuit performance of MOS tube before and after transplantation, the feasibility and effectiveness of the reusing method are proved.
【學位授予單位】：杭州電子科技大學
【學位級別】：碩士
【學位授予年份】：2017
【分類號】：TN722.77

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本文編號：1914626