本文選題：毫米波 + CMOS��； 參考：《電子科技大學》2015年碩士論文

【摘要】：社會的發(fā)展和進步使得人們對具有高數(shù)據(jù)傳輸速率、大接入容量的無線通信系統(tǒng)的需求越來越強烈,現(xiàn)有的無線通信標準受限于有限的頻譜和信道資源,很難滿足這些的要求。基于相控陣結構的毫米波通信系統(tǒng)是解決這些問題的潛在技術方案,而硅基CMOS技術的發(fā)展進步使得低功耗、低成本和高集成度的相控陣系統(tǒng)單片集成成為可能。作為其中的關鍵電路模塊,移相器的設計至關重要,本文主要目的就是研究利用CMOS工藝設計出高精度、低功耗的毫米波移相器。本設計采用基于矢量合成技術的有源結構以提高電路的信號增益、克服硅基工藝的高插損特性對移相器性能的限制。整個電路結構分為三個主要部分,包括可變增益控制單元、正交信號發(fā)生器以及信號合成器。為了減小電路的面積和功耗,電路沒有使用全差分的結構形式而是在傳統(tǒng)結構的基礎上進行了改進�？勺冊鲆鎲卧惶岬诫娐返牡谝患�,它在控制信號的作用下對輸入信號進行離散的增益控制,并將兩路不同大小的同相信號分配到下一級;正交信號發(fā)生器由電容電感組成的高低通網(wǎng)絡來實現(xiàn),它具有頻帶寬、低損耗的特點;信號合成器由兩個Gilbert單元電路組成,它分為兩級結構,其中的共源放大器對信號進一步放大以補償無源正交網(wǎng)絡的損耗,另一部分則在控制信號作用下對合成信號的極性進行選擇。除此之外,電路中使用了基于電流復用的技術片上巴倫將兩路正交信號轉化為四路差動信號,這樣既可以減小電路面積又降低了直流功耗。該60GHz有源移相器采用TSMC 90 nm RF CMOS工藝進行設計,經(jīng)流片測試:移相器可以實現(xiàn)360o范圍內(nèi)4bit相位精度,在57~64GHz頻率范圍內(nèi),16個相位狀態(tài)下均方根增益誤差為0.75~1.6 dB,均方根相位誤差為2.3o~7.6o。電路的噪聲系數(shù)為9~12dB,移相器的峰值功率增益約為2.5dB(@60.5GHz),整個芯片的面積約為0.61mm2,在1.8V的供電電壓下電路功耗為19.8mW。
[Abstract]:With the development and progress of society, the demand for wireless communication systems with high data transmission rate and large access capacity is becoming more and more intense. The existing wireless communication standards are limited by limited spectrum and channel resources, so it is difficult to meet these requirements. Millimeter-wave communication system based on phased array structure is a potential solution to these problems, and the development of silicon-based CMOS technology makes it possible to integrate single-chip phased array systems with low power consumption, low cost and high integration. As a key circuit module, the design of phase shifter is very important. The main purpose of this paper is to design a high-precision, low-power millimeter wave phase shifter using CMOS technology. The active structure based on vector synthesis technology is used to improve the signal gain of the circuit and overcome the limitation of the high insertion loss characteristics of the silicon based process on the performance of the phase shifter. The whole circuit is divided into three main parts, including variable gain control unit, orthogonal signal generator and signal synthesizer. In order to reduce the area and power consumption of the circuit, the circuit is improved on the basis of the traditional structure instead of the fully differential structure. The variable gain unit is referred to the first stage of the circuit. It performs discrete gain control on the input signal under the action of the control signal, and allocates two different sizes of the same belief signal to the next stage. The quadrature signal generator is realized by high and low pass network composed of capacitive inductance. It has the characteristics of frequency bandwidth and low loss. The signal synthesizer is composed of two Gilbert unit circuits, and it is divided into two stages. The common source amplifier further amplifies the signal to compensate for the loss of the passive orthogonal network. The other part selects the polarity of the composite signal under the action of the control signal. In addition, based on current multiplexing technology, Barron converts two orthogonal signals into four-channel differential signals, which can reduce the circuit area and DC power consumption. The 60GHz active phase shifter is designed by TSMC 90 nm RF CMOS process. The phase shifter can achieve the 4bit phase accuracy in the range of 360 o by using the TSMC 90 nm RF CMOS process. In the 57~64GHz frequency range, the RMS gain error in the 16 phase states is 0.751.6dB, and the RMS phase error is 2.3o0 / 7.6o. The noise coefficient of the circuit is 9 ~ 12 dB, the peak power gain of the phase shifter is about 2.5 dB / s and the area of the whole chip is about 0.61mm ~ 2, and the power consumption of the circuit is 19.8mW at 1.8V power supply voltage.
【學位授予單位】：電子科技大學
【學位級別】：碩士
【學位授予年份】：2015
【分類號】：TN623
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本文編號：1908709