本文選題：納米CMOS集成電路 + 單粒子多瞬態(tài)�。� 參考：《國防科學技術大學》2015年博士論文

【摘要】：伴隨著我國航天工業(yè)和航天活動的不斷成長,抗輻照集成電路相關研究經(jīng)歷了從無到有,從弱到強的發(fā)展歷程,空間輻射效應以及集成電路抗輻照設計已成為學術界和工業(yè)界的研究熱點和難點。近年來,航天應用不斷向高精尖邁進,其對數(shù)據(jù)、圖像處理的需求急劇增長,這使得航天應用中采用先進納米工藝成為必然。然而,納米尺度下,器件集成密度急劇上升,電路工作頻率上升,電路工作電壓下降,使得單粒子瞬態(tài)(SET)的產(chǎn)生與傳播變得更加復雜,單粒子多瞬態(tài)(SEMT)成為SET的常態(tài),軟錯誤(SER)發(fā)生的概率明顯上升。本文著眼于單粒子多瞬態(tài)(SEMT)研究,基于“SEMT產(chǎn)生與傳播機理?SEMT實驗表征?SEMT抑制”這條主線,對納米集成電路中單粒子多瞬態(tài)進行了多角度揭示,主要表現(xiàn)如下四個方面:(1)研究了同一路徑上單粒子多瞬態(tài)脈沖的相互作用,發(fā)現(xiàn)納米工藝下同一路徑上多個晶體管可能產(chǎn)生2個以上的隱式單粒子瞬態(tài)脈沖,這些脈沖存在相互疊加的現(xiàn)象,進而誘發(fā)單粒子瞬態(tài)脈沖壓縮(PQ)效應和單粒子瞬態(tài)脈沖窄后寬(PBAN)效應。不同工藝節(jié)點的Geant4模擬表明,工藝尺寸的縮減使得PQ和PBAN效應的發(fā)生概率持續(xù)增加;而在22納米工藝節(jié)點下,同一路徑上離輸入最近的晶體管上產(chǎn)生的SET有60%的概率發(fā)生脈沖PQ效應,且這些被壓縮的SET又有30%的概率再次被展寬。(2)研究了時序邏輯中非存儲節(jié)點上單粒子多瞬態(tài)脈沖產(chǎn)生規(guī)律,發(fā)現(xiàn)了納米工藝下觸發(fā)器數(shù)據(jù)輸入和時鐘輸入上產(chǎn)生的單粒子雙瞬態(tài)誘發(fā)單粒子翻轉機制。所設計的65nm雙阱工藝測試芯片相關重離子實驗結果不僅證實了該機制的存在,還首次表明了65nm工藝節(jié)點下該新型機制對單粒子翻轉的貢獻可能超過10%。同時,不同工藝尺寸的模擬表明,工藝尺寸的縮減使得SEMT誘發(fā)翻轉所需的能量閾值降低。(3)研究了組合邏輯中通用單粒子多瞬態(tài)的測試方法,發(fā)現(xiàn)基于標準單元中任意單元構成縱向鏈陣列可以較好地實現(xiàn)組合邏輯中SEMT的產(chǎn)生,而將傳統(tǒng)SET脈沖測量電路進行組合設計為SEMT脈沖測量電路即可對產(chǎn)生的SEMT進行在線捕獲。本文基于反相器構成了的鏈陣列為UniVIC測試結構,并在65nm雙阱和三阱工藝下生產(chǎn)出測試芯片。相關重離子實驗結果表明:a)、在LET≤40 MeV?cm2/mg的輻射條件下,65納米工藝下單粒子轟擊最多影響3個晶體管,也就是最多產(chǎn)生單粒子三瞬態(tài)(SETT);b)、雙阱結構下電荷共享誘發(fā)SEMT的概率不超過30%,而誘發(fā)SEMT時平均電荷共享強度達到80%~90%;c)、三阱結構下電荷共享誘發(fā)SEMT的概率顯著提高到了約55%,但是誘發(fā)SEMT時平均電荷共享強度卻減小到75%~80%。(4)研究了納米工藝下SEMT的抑制技術,提出了鏡像法和無縫保護帶技術,并提出了單元級加固思想。該思想指出在標準單元中運用SET/SEMT加固技術可以有效降低電路的SER,且基于標準單元電路特征可對不同單元采用不同方式的SET/SEMT加固。本文提出的鏡像法主要適用于具有兩級級聯(lián)結構的標準單元(如與非門),它通過增強前級和后級的電荷共享來強化前后兩級產(chǎn)生的單粒子雙瞬態(tài)(SEDT)相互抵消,進而抑制了單元末端SET的脈沖寬度。模擬結果表明:當前級PMOS處于關斷狀態(tài)時,鏡像法能將末端SET消減超過25%;當前級PMOS處于開態(tài)時,鏡像法能將末端SET消減約10%。而無縫保護帶技術則主要適用于簡單標準單元。模擬結果表明,65nm工藝節(jié)點下,對于入射能量小于40 MeV?cm2/mg的入射粒子,無縫保護帶技術能徹底消除SEMT的產(chǎn)生,并且產(chǎn)生的SET脈沖寬度可減少約50%。本文之前關于電荷共享的研究數(shù)以百計,然而除時序邏輯MCU的研究較為清晰之外,組合邏輯中SEMT產(chǎn)生和傳播以及最終對SER的影響涉及較少。一方面,本文改進了SEMT測量方法,首次提出了通用的SEMT測量方法,能適用于任意標準單元間SEMT產(chǎn)生分布的測量,也能適用于更先進工藝下SEMT產(chǎn)生分布的測量。另一方面,本文在前人的基礎上對SEMT的產(chǎn)生與傳播進行了有限地揭示,并提出了有效可行的SEMT抑制技術,這對指導納米尺度下SER評估與預測提供了原始數(shù)據(jù),有利于提高SER評估精度;也為抗輻照納米集成電路設計提供了更為可靠的指導。
[Abstract]:With the continuous growth of space industry and space activities in China, the related research of anti radiation integrated circuits has experienced the development course from scratch, from weak to strong. Space radiation effect and integrated circuit anti radiation design have become the hot and difficult points in the academic and industrial circles. The demand for data and image processing has increased dramatically, which makes it inevitable to use advanced nanotechnology in space applications. However, the density of the devices is rising rapidly, the frequency of circuit work is rising, and the working voltage of the circuit is falling, which makes the generation and propagation of single particle transient (SET) more complex, single particle and multiple transient (SEMT). For the normal state of SET, the probability of the occurrence of soft error (SER) is obviously rising. This paper focuses on the single particle transient (SEMT) study. Based on the main line of "SEMT generation and propagation mechanism, SEMT experimental characterization? SEMT suppression", the multiple angles of single particle transient in nanoscale integrated circuits are revealed in many angles, mainly in the following four aspects: (1) the same one is studied. The interaction of single particle multi transient pulses on the path shows that more than 2 transistors on the same path in the nanotechnology may produce more than 2 implicit single particle transient pulses. These pulses have the phenomenon of overlapping each other, and then induce the single particle transient pulse compression (PQ) effect and the single particle transient pulse narrow after width (PBAN) effect. The Geant4 simulation of the art node shows that the reduction of the process size makes the probability of the PQ and PBAN effects increase continuously; and under the 22 nanotechnology node, the SET produced on the nearest transistor on the same path has a probability of 60% pulse PQ effect, and the probability of these compressed SET has a 30% probability to be broadened again. (2) a study was made. The rule of single particle transient pulse generation on a non storage node in sequential logic is found. The single particle double transient induced single particle flip mechanism is found in the data input of the trigger and the clock input in the nanotechnology. The experimental results of the related heavy ion of the 65nm double well process test chip not only confirm the existence of this mechanism, but also the first table. It is clear that the contribution of the new mechanism to single particle flipping may exceed 10%. at the same time in the 65nm process node. The simulation of different process sizes shows that the reduction of the process size makes the energy threshold of the SEMT induced turn down. (3) the testing method of the single particle multi transient in the combinational logic is studied, and it is found that any single single particle in the standard unit is based on any single. The formation of SEMT in combinatorial logic can be achieved by the composition of the longitudinal chain array, and the traditional SET pulse measurement circuit is designed as a SEMT pulse measurement circuit to capture the generated SEMT online. In this paper, the chain array composed of the inverters is a UniVIC test node and produced under the 65nm double well and three well process. Test chip. The results of related heavy ion experiments show: a), under the radiation condition of LET < 40 MeV? Cm2/mg, the single particle bombardment under 65 nanometers is most influential to 3 transistors, that is, the maximum generation of single particle three transient (SETT) and b). The probability of the charge sharing induced SEMT under the double well structure is not more than 30%, and the average charge sharing intensity of SEMT is induced. 80%~90%; c), the probability of charge sharing induced SEMT in the three well structure increased to about 55%, but the average charge sharing intensity decreased to 75%~80%. (4) when SEMT was induced, and the inhibition technology of SEMT under the nanotechnology was studied. The mirror image method and the seamless protective belt technology were proposed, and the unit level strengthening thought was put forward. The use of SET/SEMT reinforcement in the unit can effectively reduce the SER of the circuit, and based on the characteristics of the standard unit circuit, the different units can be reinforced by different ways of SET/SEMT reinforcement. The image method proposed in this paper is mainly applied to the standard unit with two cascade structures (such as NAND gate), which is strong by increasing the charge sharing of the front and rear stages. The single particle double transient (SEDT) produced before and after the two stages counteracts each other and inhibits the pulse width of the terminal SET at the end of the unit. The simulation results show that the mirror method can reduce the end SET by more than 25% when the current level PMOS is in the turn off state; when the current stage PMOS is in open state, the mirror method can reduce the end SET about 10%. and the seamless protective belt technology is main. It is suitable for simple standard units. The simulation results show that under the 65nm process node, for the incident particles with incident energy less than 40 MeV? Cm2/mg, the seamless protective band technology can completely eliminate the production of SEMT, and the generated SET pulse width can reduce the number of hundreds of studies on charge sharing before this article, but except the temporal logic MCU In addition to the clearer research, the SEMT generation and propagation in combinatorial logic and the influence of the final SER are less involved. On the one hand, this paper improves the SEMT measurement method and proposes the general SEMT measurement method for the first time. It can be applied to the measurement of SEMT production distribution between arbitrary standard units, and can also be applied to the measurement of SEMT production distribution under the more advanced technology. On the other hand, on the basis of the predecessors, the generation and propagation of SEMT have been limited, and the effective and feasible SEMT suppression technology is proposed. This provides the original data for guiding the evaluation and prediction of SER in the nanometer scale, and is helpful to improve the accuracy of the evaluation of the SER, and also provides a more reliable reference for the design of the anti irradiance nanoscale integrated circuits. Guide.

【學位授予單位】：國防科學技術大學
【學位級別】：博士
【學位授予年份】：2015
【分類號】：TN432

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