本文選題：IC設(shè)計(jì)平臺(tái) + 中國自主標(biāo)準(zhǔn)　； 參考：《西安電子科技大學(xué)》2015年碩士論文

【摘要】：RFID是Radio Frequency Identification的簡稱,是通過高頻或者超高頻射頻載波信號(hào)傳輸數(shù)據(jù)的一種短距離無線通信技術(shù)。隨著移動(dòng)通信技術(shù)的飛速發(fā)展,IoE(Internet of Everything)等物聯(lián)網(wǎng)概念逐漸成為現(xiàn)實(shí),RFID技術(shù)又成為了產(chǎn)學(xué)研關(guān)注的熱點(diǎn)。RFID是關(guān)系到國家信息安全的技術(shù)和應(yīng)用,國家早在2006年就出臺(tái)了相關(guān)政策,然后在2009年由相關(guān)單位起草并制定了中國自主標(biāo)準(zhǔn)協(xié)議,該協(xié)議不斷被修訂和完善,基于該協(xié)議的標(biāo)簽芯片、閱讀器和系統(tǒng)應(yīng)用不斷被設(shè)計(jì)開發(fā)出來。但是受限于設(shè)計(jì)和制造水平,標(biāo)簽芯片大都是功耗過高、通信距離過短,無法實(shí)現(xiàn)大規(guī)模的商用,也無法與國外同類產(chǎn)品在市場中競爭。近兩年來,在國家的大力支持和引導(dǎo)下,集成電路產(chǎn)業(yè)進(jìn)入了高速發(fā)展的階段。集成電路產(chǎn)業(yè)人才數(shù)量的不足、人才質(zhì)量偏低、高校與產(chǎn)業(yè)嚴(yán)重脫軌等的問題日益突出,這也是我國集成電路產(chǎn)業(yè)要強(qiáng)力起飛最大的束縛之一。高校的實(shí)驗(yàn)室環(huán)境是這些人才進(jìn)入產(chǎn)業(yè)前最后的訓(xùn)練場,實(shí)驗(yàn)室項(xiàng)目是培養(yǎng)能力和積累經(jīng)驗(yàn)最好的途徑。而本文的作者發(fā)現(xiàn),很多集成電路設(shè)計(jì)方向的實(shí)驗(yàn)室的設(shè)計(jì)平臺(tái)效率低下,采用的設(shè)計(jì)方法落后,服務(wù)器硬件資源被嚴(yán)重浪費(fèi),無法利用EDA(Electronic Design Automation)工具的先進(jìn)性和高性能,這就大大的增加了完成項(xiàng)目所用的時(shí)間,也就減少了學(xué)習(xí)其他更先進(jìn)的更接近產(chǎn)業(yè)的IC(Integrated Circuit)設(shè)計(jì)方法的時(shí)間。本文作者所在的實(shí)驗(yàn)室也存在類似的問題,由于沒有規(guī)范的設(shè)計(jì)平臺(tái)與流程,設(shè)計(jì)與驗(yàn)證的效率比較低下。本文在Linux操作系統(tǒng)上,基于Linux Shell語言和Tcl/Tk語言,結(jié)合對(duì)主流的Synopsys的IC設(shè)計(jì)、實(shí)現(xiàn)、驗(yàn)證EDA工具的深入學(xué)習(xí)和理解,分析了搭建高效的IC設(shè)計(jì)平臺(tái)所需要的關(guān)鍵技術(shù),設(shè)計(jì)了該平臺(tái)所需的所有腳本程序。本文搭建的平臺(tái)包括代碼版本控制系統(tǒng)、仿真驗(yàn)證腳本生成程序和邏輯綜合腳本生成程序三部分。平臺(tái)中的代碼版本控制系統(tǒng),能幫助IC設(shè)計(jì)者高效管理代碼的版本,分為Linux Shell語言設(shè)計(jì)的代碼檢入子系統(tǒng)和Tcl/Tk設(shè)計(jì)的代碼檢出GUI(Graphical User Interface)子系統(tǒng)。平臺(tái)中的仿真驗(yàn)證腳本生成程序由Tcl/Tk設(shè)計(jì),能幫助IC設(shè)計(jì)者經(jīng)過簡單的選項(xiàng)設(shè)置,就能生成仿真驗(yàn)證工具VCS-MX所需的Makefile腳本。平臺(tái)中的邏輯綜合腳本生成程序由Tcl/Tk設(shè)計(jì),能幫助IC設(shè)計(jì)者快速地生成符合自己設(shè)計(jì)要求的綜合腳本。在本文設(shè)計(jì)的IC設(shè)計(jì)平臺(tái)上,基于中國自主標(biāo)準(zhǔn)RFID協(xié)議,結(jié)合對(duì)芯片設(shè)計(jì)實(shí)現(xiàn)的理解,分析了設(shè)計(jì)標(biāo)簽芯片基帶電路所需要的包括低功耗設(shè)計(jì)方法在內(nèi)的關(guān)鍵技術(shù),設(shè)計(jì)了基帶的Verilog代碼,完成了綜合前的功能驗(yàn)證、基于DesignCompiler的邏輯綜合、基于PrimeTime PX的功耗分析,最終在基于FPGA(Field Programmable Gate Array)的板級(jí)系統(tǒng)上實(shí)現(xiàn)了與閱讀器的聯(lián)合驗(yàn)證。本文設(shè)計(jì)的基帶電路在幾乎不增加面積的情況下,相比基于同樣協(xié)議的上一代設(shè)計(jì),功耗降低了大約30%,并在與閱讀器和聯(lián)合驗(yàn)證中,協(xié)議一致性測試完全通過;由于采用了本文搭建的IC設(shè)計(jì)平臺(tái),使得整個(gè)芯片的設(shè)計(jì)、實(shí)現(xiàn)、驗(yàn)證時(shí)間大大的減少了,極大地提高了完成項(xiàng)目的效率。這也驗(yàn)證了本文所搭建的芯片設(shè)計(jì)平臺(tái)在功能上的正確性和實(shí)用性。本文搭建的IC設(shè)計(jì)平臺(tái)在實(shí)驗(yàn)室的其他項(xiàng)目中也被廣泛的采用,收到了很好的效果;如果能經(jīng)過進(jìn)一步的完善,可以在其他的高校實(shí)驗(yàn)室進(jìn)行推廣使用。本文所設(shè)計(jì)的標(biāo)簽芯片已經(jīng)順利地進(jìn)入流片階段。
[Abstract]:RFID is the abbreviation of Radio Frequency Identification, a short distance wireless communication technology that transmits data through high frequency or UHF carrier signal. With the rapid development of mobile communication technology, the concept of Internet of things such as IoE (Internet of Everything) has gradually become a reality, and RFID technology has become a hot.RFID of the research and research research. It is related to the technology and application of national information security. The state promulgated relevant policies in 2006, and then drafted and formulated the Chinese independent standard protocol in 2009 by relevant units. The protocol is constantly revised and perfected. The label chip based on the protocol, reader and system applications have been designed and developed continuously. At the level of design and manufacture, most of the label chips are too high power consumption, too short communication distance, can not achieve large-scale commercial use, and can not compete with foreign products in the market. In the last two years, under the strong support and guidance of the state, the integrated circuit industry has entered the stage of high speed development. The problem of low quality and serious derailment of universities and industries is becoming more and more serious. This is one of the biggest constraints in the strong take-off of the integrated circuit industry in China. The laboratory environment in Colleges and universities is the last training field before these talents enter the industry. The laboratory project is the best way to cultivate ability and accumulate experience. The author of this paper finds that The design platform of a lot of integrated circuit design directions is inefficient, the design method is backward, the hardware resources of the server are badly wasted, the advanced and high performance of the EDA (Electronic Design Automation) tool can not be used. This greatly increases the time used to complete the project, and reduces the other more advanced learning. The time in which the IC (Integrated Circuit) design method is closer to the industry. There are similar problems in the laboratory of the author. Because there is no standard design platform and process, the efficiency of design and verification is relatively low. On the Linux operating system, this paper is based on the Linux Shell language and the Tcl/Tk language, combined with the I of the mainstream Synopsys. C design, implement, verify the in-depth study and understanding of the EDA tools, analyze the key technologies needed to build an efficient IC design platform, and design all the scripts required for the platform. This platform includes the code version control system, the simulation verification script generation process and the logical synthesis script generating program three parts. The code version control system can help IC designers to efficiently manage the version of the code. It is divided into the Linux Shell language design code checking subsystem and the Tcl/Tk designed code detection GUI (Graphical User Interface) subsystem. The simulation verification script generator in the platform is designed by Tcl/ Tk, which can help IC designers to pass simple options Set up, the Makefile script required by the simulation verification tool VCS-MX can be generated. The logical synthesis script generating program in the platform is designed by Tcl/Tk, which can help the IC designers to quickly generate the comprehensive scripts that meet their own design requirements. On the IC design platform designed in this paper, based on the independent standard RFID protocol of China, the design of the chip is implemented. The key technology, including the low power design method, designed for the baseband circuit of the design label chip is analyzed, the Verilog code of the baseband is designed, the function verification before the synthesis is completed, the logic synthesis based on the DesignCompiler, the power analysis based on the PrimeTime PX, is finally based on the FPGA (Field Programmable Gate Array). In the board level system, the joint verification with the reader is implemented. The baseband circuit designed in this paper reduces the power consumption by about 30% compared to the previous generation based on the same protocol without increasing the area, and the protocol consistency test is all passed in the reader and joint verification; the IC design platform built in this paper has been adopted. The design, implementation and verification time of the whole chip are greatly reduced and the efficiency of the project is greatly improved. This also validates the correctness and practicability of the chip design platform built in this paper. The IC design platform built in this paper is also widely used in other laboratory projects and has received good results. If it can be further improved, it can be used in other university laboratories. The label chip designed in this paper has been successfully entered into the flow stage.

【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TP391.44;TN402

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