本文選題：多核流水 + 在軌數(shù)據(jù)處理��； 參考：《北京郵電大學(xué)》2015年碩士論文

【摘要】：目前現(xiàn)有的星載計(jì)算機(jī)處理能力不足,尤其是在進(jìn)行遙感圖像數(shù)據(jù)處理時(shí),通常將獲取到的遙感圖像通過壓縮,然后下傳到地面站來進(jìn)行處理。由于當(dāng)前遙感衛(wèi)星獲取到的圖像分辨率越來越高,而下傳數(shù)據(jù)的帶寬有限,導(dǎo)致現(xiàn)有遙感衛(wèi)星的高數(shù)據(jù)獲取量和低下傳帶寬之間的矛盾越來越嚴(yán)重。迫切需要提高星載計(jì)算機(jī)的處理能力,讓遙感衛(wèi)星具有在軌數(shù)據(jù)處理能力,提升現(xiàn)有遙感衛(wèi)星的自主性與靈活性。多核處理技術(shù)是通過采用多個(gè)處理器來共同完成一項(xiàng)任務(wù),來加快任務(wù)的執(zhí)行效率,根據(jù)實(shí)現(xiàn)方式的不同,可分為多核并行和多核流水�，F(xiàn)有商用FPGA,比如Xilinx公司所提供的部分芯片,具有很高的邏輯容量和處理速度,并且具有一定的抗輻射能力,能夠適應(yīng)嚴(yán)苛的空間環(huán)境,可以應(yīng)用于在軌數(shù)據(jù)的處理。 本文針對在軌數(shù)據(jù)處理技術(shù)的研究現(xiàn)狀,提出了一種基于FPGA的異構(gòu)多核在軌數(shù)據(jù)處理方法,來進(jìn)行遙感圖像特征點(diǎn)的提取。圖像特征點(diǎn)的提取選用尺度、旋轉(zhuǎn)不變SURF算法,并在Xilinx Virtex-4芯片內(nèi)部實(shí)現(xiàn)了該系統(tǒng),進(jìn)行相應(yīng)的實(shí)驗(yàn)驗(yàn)證。本文的主要研究內(nèi)容有：基于FPGA的片上系統(tǒng)及異構(gòu)多核技術(shù)的研究；尺度、旋轉(zhuǎn)不變特征點(diǎn)提取SURF算法及在異構(gòu)多核系統(tǒng)上的實(shí)現(xiàn)；異構(gòu)多核在軌數(shù)據(jù)處理系統(tǒng)軟硬件的總體設(shè)計(jì)與具體實(shí)現(xiàn)；在軌數(shù)據(jù)處理系統(tǒng)的實(shí)驗(yàn)與數(shù)據(jù)分析。 本文預(yù)期達(dá)到的目標(biāo)：綜合分析現(xiàn)有星載計(jì)算機(jī)的處理能力,以及多核處理技術(shù)的特點(diǎn),提出基于FPGA異構(gòu)多核在軌數(shù)據(jù)流水處理的方法。通過應(yīng)用異構(gòu)多核數(shù)據(jù)處理技術(shù),解決現(xiàn)有星載計(jì)算機(jī)處理能力不足的問題。對SURF算法進(jìn)行研究,對其進(jìn)行合理的任務(wù)劃分,將劃分好的任務(wù)映射到異構(gòu)多核系統(tǒng)的每個(gè)處理器上進(jìn)行實(shí)現(xiàn),從而在多核間形成流水。進(jìn)行實(shí)驗(yàn)和數(shù)據(jù)分析,測試異構(gòu)多核系統(tǒng)的執(zhí)行效率。
[Abstract]:At present, the existing spaceborne computer processing ability is insufficient, especially in the remote sensing image data processing, the obtained remote sensing image is usually compressed and then sent down to the earth station for processing. Because the resolution of image acquired by remote sensing satellite is getting higher and higher, and the bandwidth of data transmitted down is limited, the contradiction between high data acquisition and low transmission bandwidth of existing remote sensing satellite is becoming more and more serious. There is an urgent need to improve the processing capacity of spaceborne computers, to enable remote sensing satellites to process data in orbit, and to enhance the autonomy and flexibility of existing remote sensing satellites. Multi-core processing technology can be divided into multi-core parallelism and multi-core pipelining according to the different implementation methods by using multiple processors to complete a task together to speed up the task execution efficiency. The existing commercial FPGAs, such as some chips provided by Xilinx, have very high logic capacity and processing speed, and have the ability to resist radiation, which can adapt to the harsh space environment and can be applied to the processing of in-orbit data. In this paper, a heterogeneous multi-core on-orbit data processing method based on FPGA is proposed to extract the feature points of remote sensing image. The image feature points are extracted by scale, rotation invariant SURF algorithm, and the system is implemented in the Xilinx Virtex-4 chip, and the corresponding experimental verification is carried out. The main research contents of this paper are as follows: the research of the system on chip and heterogeneous multi-core technology based on FPGA, the SURF algorithm of extracting the invariant feature points from scale and rotation, and the realization of the algorithm on the heterogeneous multi-core system. The hardware and software design and implementation of heterogeneous multi-core on-orbit data processing system, the experiment and data analysis of in-orbit data processing system. The purpose of this paper is to comprehensively analyze the processing capability of existing spaceborne computers and the characteristics of multi-core processing technology, and propose a water treatment method based on FPGA heterogeneous multi-core on-orbit data flow. By applying heterogeneous multi-core data processing technology, the problem of insufficient processing capacity of existing spaceborne computers is solved. The SURF algorithm is studied, and the task is divided reasonably, and the partitioned tasks are mapped to each processor in the heterogeneous multi-core system for implementation, so as to form a pipeline between the multi-cores. Experiments and data analysis are carried out to test the execution efficiency of heterogeneous multicore systems.
【學(xué)位授予單位】：北京郵電大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN791;TP274

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