本文選題：微電子封裝 + 多物理域��； 參考：《西安電子科技大學(xué)》2015年碩士論文

【摘要】：隨著微電子封裝系統(tǒng)日益輕薄化,性能要求越來(lái)越高,功率密度越來(lái)越大,其面臨的熱-機(jī)械可靠性和熱、電性能問(wèn)題也越來(lái)越突出。同時(shí),微電子封裝系統(tǒng)的熱-機(jī)械可靠性和熱、電性能容易同時(shí)受到多個(gè)外界環(huán)境因素的共同作用,具有顯著的多物理域特征,因而如何有效進(jìn)行多物理域優(yōu)化設(shè)計(jì)已成為微電子封裝領(lǐng)域研究的熱點(diǎn)和難點(diǎn)。本文采用仿真分析方法研究采用28納米工藝技術(shù)節(jié)點(diǎn)的(Flip Chip-Chip Scale Package,FCCSP)封裝的熱-機(jī)械可靠性和熱、電性能。重點(diǎn)實(shí)現(xiàn)多物理場(chǎng)耦合分析與優(yōu)化,將仿真分析技術(shù)真正滲透到產(chǎn)品設(shè)計(jì)開(kāi)發(fā)的各個(gè)階段,便于提高產(chǎn)品的設(shè)計(jì)技術(shù)水平、產(chǎn)品性能與可靠性。本文主要從以下3個(gè)方面開(kāi)展研究工作:(1)基于熱-機(jī)械可靠性仿真分析平臺(tái)ANSYS Workbench,采用實(shí)驗(yàn)設(shè)計(jì)方法系統(tǒng)研究塑封體厚度、芯片厚度、基板厚度等結(jié)構(gòu)參數(shù)和塑封料類(lèi)型等材料參數(shù)對(duì)FCCSP封裝的翹曲大小和應(yīng)力分布的影響,并進(jìn)行翹曲和應(yīng)力最小化的優(yōu)化設(shè)計(jì)。研究發(fā)現(xiàn)不同封裝設(shè)計(jì)方案下芯片的應(yīng)力水平無(wú)明顯變化,而封裝和芯片的翹曲則明顯不同。得到了使封裝的翹曲和應(yīng)力同時(shí)最小的封裝設(shè)計(jì)方案,有效提升了封裝的熱-機(jī)械可靠性。(2)采用基于計(jì)算流體力學(xué)的Flotherm熱仿真軟件,首先研究封裝尺寸、芯片尺寸、封裝基板內(nèi)層銅厚、封裝基板BT材料熱導(dǎo)率和封裝基板Solder Mask層開(kāi)窗大小對(duì)FCCSP封裝封裝級(jí)熱性能的影響,然后研究PCB方向散熱器翅板數(shù)目和塑封體方向散熱器翅板數(shù)目對(duì)FCCSP封裝系統(tǒng)級(jí)熱性能的影響,得到了合理的散熱器翅板數(shù)目和排布方式。通過(guò)仿真分析,實(shí)現(xiàn)了FCCSP封裝的散熱性能優(yōu)化設(shè)計(jì),得到了封裝級(jí)和系統(tǒng)級(jí)的最優(yōu)散熱方案。(3)基于ANSYS HFSS電性能仿真平臺(tái),采用頻域分析法,對(duì)FCCSP封裝的信號(hào)完整性和電源完整性進(jìn)行仿真分析,研究無(wú)源通道各功能部件對(duì)信號(hào)質(zhì)量的影響,并將信號(hào)完整性進(jìn)行一體化建模研究。研究發(fā)現(xiàn):增加電源平面面積,不但可以降低直流壓降,而且可以起到分散電流密度,避免了因個(gè)別線路上電流過(guò)大,造成線路熔斷等影響可靠性等問(wèn)題。
[Abstract]:With the increasing thinning of microelectronic packaging systems, the performance requirements are becoming higher and higher, and the power density is increasing. The thermal mechanical reliability, thermal and electrical performance of microelectronic packaging systems are becoming more and more prominent. At the same time, the thermal mechanical reliability and thermal properties of the microelectronic packaging system are easily affected by many external environmental factors at the same time. Therefore, how to effectively carry out multi-physical domain optimization design has become a hot and difficult point in the field of microelectronic packaging. In this paper, the thermal mechanical reliability and thermal and electrical properties of Flip Chip-Chip Scale package Chip-Chip package with 28 nanoscale technology nodes are studied by simulation analysis. The multi-physical field coupling analysis and optimization are realized, and the simulation analysis technology is really infiltrated into every stage of product design and development, which is convenient to improve the level of product design technology, product performance and reliability. Based on the thermal-mechanical reliability simulation platform ANSYS Workbench, the thickness of plastic seal and chip is systematically studied by experimental design method. The effects of structural parameters such as substrate thickness and type of plastic seal on the warpage size and stress distribution of FCCSP packaging were investigated and the optimum design of warpage and stress minimization was carried out. It is found that there is no significant change in the stress level of the chip under different package design schemes, but the warpage between the package and the chip is obviously different. A package design with minimum warping and stress is obtained, and the thermal-mechanical reliability of the package is improved effectively. The Flotherm thermal simulation software based on computational fluid dynamics is used to study the package size and chip size. The influence of the inner copper thickness of the packaging substrate, the thermal conductivity of the packaging substrate BT material and the window size of the Solder Mask layer on the thermal performance of the FCCSP package is discussed. Then, the influence of the number of fin plates in PCB direction and the number of fin plates in plastic body on the thermal performance of FCCSP packaging system is studied, and the reasonable number and arrangement of fin plates of radiators are obtained. Through simulation analysis, the optimization design of heat dissipation performance of FCCSP package is realized. The optimal heat dissipation scheme at package level and system level is obtained. Based on ANSYS HFSS electric performance simulation platform, frequency domain analysis method is used. The signal integrity and power integrity of FCCSP package are simulated and analyzed, and the influence of various functional components of passive channel on signal quality is studied. The integrated modeling of signal integrity is carried out. It is found that increasing the plane area of the power supply can not only reduce the DC voltage drop, but also disperse the current density, and avoid the problem that the over-large current on some lines will affect the reliability of the circuit, such as circuit breakage and so on.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類(lèi)號(hào)】：TN405

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本文編號(hào)：1853462