本文選題：4H-SiC + 靜電感應(yīng)晶體管　； 參考：《蘭州交通大學(xué)》2017年碩士論文

【摘要】：在過去的70年中,半導(dǎo)體行業(yè)在電路設(shè)計領(lǐng)域發(fā)展迅速,更高集成度的半導(dǎo)體芯片以18個月翻倍器件數(shù)目的速度推進(jìn)了一代代新的電子產(chǎn)品的出現(xiàn)。與之相比,半導(dǎo)體材料和半導(dǎo)體器件研究領(lǐng)域的發(fā)展現(xiàn)狀就顯得不盡人意。目前占領(lǐng)半導(dǎo)體材料市場的依舊是最早使用的半導(dǎo)體材料Si,在半導(dǎo)體器件尤其是電力電子器件領(lǐng)域,晶閘管等老式器件依舊是大規(guī)模商業(yè)生產(chǎn)的主流。SiC材料被認(rèn)為是未來最有可能替代Si材料的新型半導(dǎo)體材料,而靜電感應(yīng)晶體管也是正在蓬勃發(fā)展的新型半導(dǎo)體器件。因此,對SiC襯底材料的靜電感應(yīng)晶體管的研發(fā)是很有研究前景的課題。本論文選題基于電力電子器件的發(fā)展要求與SiC材料的前景,結(jié)合導(dǎo)師國家自然基金項目課題,旨在研發(fā)出具有更高性能與使用規(guī)模的電力電子器件。本文通過對SiC材料以及靜電感應(yīng)晶體管的理論研究與分析,使用Silvaco Tcad軟件對SiC靜電感應(yīng)晶體管的相關(guān)工藝進(jìn)行了模擬仿真,完成了4H-SiC靜電感應(yīng)晶體管的設(shè)計,并通過對相關(guān)參數(shù)的研究完成了所設(shè)計的4H-SiC靜電感應(yīng)晶體管的優(yōu)化。本論文研究的主要工作包括:一、對比了目前半導(dǎo)體材料的性能、工藝和成本等方面的優(yōu)缺點,分析了適合于作為未來普及的半導(dǎo)體材料,最終選擇4H-SiC材料作為研究目標(biāo),并將其運用到靜電感應(yīng)晶體管的設(shè)計中。二、研究了靜電感應(yīng)晶體管的工作原理,通過Si襯底靜電感應(yīng)晶體管分析了現(xiàn)有的靜電感應(yīng)晶體管器件的分類并選擇平面型埋柵結(jié)構(gòu)靜電感應(yīng)晶體管作為研究對象。通過對靜電感應(yīng)晶體管的研究,參考Si襯底靜電感應(yīng)晶體管,簡單設(shè)置了4H-SiC靜電感應(yīng)晶體管的初始參數(shù)。三、通過對4H-SiC材料的研究以及工藝分析,完成了4H-SiC靜電感應(yīng)晶體管設(shè)計制造中的相關(guān)工藝過程的模擬仿真。包括了定義4H-SiC襯底材料并劃分了器件仿真網(wǎng)格,模擬仿真4H-SiC中,離子注入的雜質(zhì)摻雜分布工藝。通過Silvaco Tcad軟件中內(nèi)嵌的優(yōu)化工具Optimizer對4H-SiC的退火工藝參數(shù)進(jìn)行了優(yōu)化。通過材料分析與功能仿真,最終完成了器件的工藝仿真以及初始參數(shù)設(shè)置。四、通過器件編輯器DevEdit對影響4H-SiC靜電感應(yīng)晶體管的相關(guān)參數(shù)進(jìn)行了模擬仿真與理論分析。包括對器件的類五級管工作狀態(tài)和類三級管工作狀態(tài)的模擬仿真,對包括溝道相關(guān)參數(shù)及漂移區(qū)相關(guān)參數(shù)在內(nèi)的相關(guān)參數(shù)的模擬仿真和對SiC材料雜質(zhì)不完全離化模型的仿真。五、根據(jù)已經(jīng)進(jìn)行的模擬仿真與性能分析,最終得到了優(yōu)化后的器件模型,并對優(yōu)化后的模型模擬仿真,提取了器件的性能參數(shù)。將設(shè)計的4H-SiC靜電感應(yīng)晶體管與項目組完成的Si靜電感應(yīng)晶體管進(jìn)行了對比,可以明顯看出,雖然4H-SiC靜電感應(yīng)晶體管仍處于設(shè)計階段但是其性能要比Si靜電感應(yīng)晶體管有一定的提升。
[Abstract]:In the past 70 years, the semiconductor industry has developed rapidly in the field of circuit design. The more integrated semiconductor chips have promoted the emergence of new generation of electronic products at the speed of doubling the number of devices in 18 months. In contrast, the development of semiconductor materials and semiconductor devices is not satisfactory. At present, the semiconductor materials that occupy the market of semiconductor materials are still the earliest used semiconductors. In the field of semiconductor devices, especially in the field of power electronic devices, Older devices, such as thyristors, are still the mainstream of large-scale commercial production. Sic materials are considered as the most likely new semiconductor materials to replace Si materials in the future, and electrostatic induction transistors are also booming new semiconductor devices. Therefore, the research and development of electrostatic induction transistors on SiC substrate is a promising subject. Based on the development requirements of power electronic devices and the prospect of SiC materials, this thesis aims to develop power electronic devices with higher performance and use scale. Based on the theoretical research and analysis of SiC materials and electrostatic induction transistors, the related processes of SiC electrostatic induction transistors are simulated with Silvaco Tcad software, and the design of 4H-SiC static induction transistors is completed. The 4H-SiC electrostatic induction transistor is optimized by studying the related parameters. The main work of this thesis is as follows: firstly, the advantages and disadvantages of the current semiconductor materials in performance, process and cost are compared, and the suitable semiconductor materials for the future are analyzed. Finally, the 4H-SiC material is chosen as the research goal. It is applied to the design of electrostatic induction transistor. Secondly, the working principle of electrostatic induction transistor is studied. The classification of existing electrostatic induction transistor devices is analyzed by using Si substrate electrostatic induction transistor and plane buried gate electrostatic induction transistor is selected as the research object. By studying the electrostatic induction transistor and referring to the Si substrate electrostatic induction transistor, the initial parameters of the 4H-SiC electrostatic induction transistor are simply set. Thirdly, through the research of 4H-SiC material and process analysis, the simulation of the related process in the design and manufacture of 4H-SiC electrostatic induction transistor is completed. It includes defining the 4H-SiC substrate material and dividing the device simulation grid to simulate the impurity distribution process of ion implantation in 4H-SiC. The annealing process parameters of 4H-SiC were optimized by Optimizer, an optimization tool embedded in Silvaco Tcad software. Through material analysis and function simulation, the process simulation and initial parameter setting of the device are finally completed. Fourthly, the simulation and theoretical analysis of the parameters affecting the 4H-SiC electrostatic induction transistor are carried out by the device editor DevEdit. The simulation includes the simulation of the working state of the device, the simulation of the operation state of the device, the simulation of the related parameters, including the channel correlation parameters and the drift region parameters, and the simulation of the incomplete impurity ionization model of the SiC material. Finally, the optimized device model is obtained according to the simulation and performance analysis, and the performance parameters of the device are extracted from the optimized model simulation. Comparing the designed 4H-SiC electrostatic induction transistor with the Si electrostatic induction transistor completed by the project team, it can be seen that, Although the 4H-SiC electrostatic induction transistor is still in the design stage, its performance is better than that of Si electrostatic induction transistor.
【學(xué)位授予單位】：蘭州交通大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN32

【參考文獻(xiàn)】

相關(guān)期刊論文 前10條

1 Chunjuan LIU;Yongshun WANG;Zaixing WANG;Chao CHEN;;Electrical performance of static induction transistor with transverse structure[J];Science China(Information Sciences);2017年02期

2 王富強(qiáng);瞿宜斌;馬行空;;基于硅襯底靜電感應(yīng)晶體管器件仿真與研究[J];電子科技;2016年04期

3 陳思哲;盛況;;4700V碳化硅PiN整流二極管[J];電工技術(shù)學(xué)報;2015年22期

4 王富強(qiáng);馬行空;瞿宜斌;;表面柵靜電感應(yīng)晶體管溝道勢壘形成機(jī)理研究[J];電子世界;2015年16期

5 王永順;陳占林;汪再興;;埋柵結(jié)構(gòu)靜電感應(yīng)晶體管耐壓容量與I-V特性的改善[J];固體電子學(xué)研究與進(jìn)展;2012年03期

6 朱筠;李思淵;;復(fù)合結(jié)構(gòu)靜電感應(yīng)晶體管的終端造型[J];科技信息;2011年25期

7 王守國;張巖;;利用離子注入技術(shù)制備新型結(jié)構(gòu)SiC器件的展望[J];自然雜志;2011年04期

8 陳剛;王雯;柏松;李哲洋;吳鵬;李宇柱;倪煒江;;UHF頻段高功率SiC SIT[J];固體電子學(xué)研究與進(jìn)展;2011年01期

9 李春;陳剛;;離子注入工藝在4H-SiC器件中的應(yīng)用[J];半導(dǎo)體技術(shù);2008年S1期

10 楊濤;劉肅;李思淵;王永順;李海蓉;;槽柵型肖特基勢壘靜電感應(yīng)晶體管[J];半導(dǎo)體技術(shù);2008年01期

相關(guān)會議論文 前2條

1 陳剛;李理;蔣浩;陶然;柏松;李峗;尹志軍;;L波段16.5W/cm碳化硅靜電感應(yīng)晶體管研究[A];2013年全國微波毫米波會議論文集[C];2013年

2 陳治明;;碳化硅電力電子器件研發(fā)進(jìn)展與存在問題[A];中國電工技術(shù)學(xué)會電力電子學(xué)會第八屆學(xué)術(shù)年會論文集[C];2002年

相關(guān)博士學(xué)位論文 前3條

1 唐瑩;電力靜電感應(yīng)器件的研制[D];蘭州大學(xué);2007年

2 郭輝;SiC器件歐姆接觸的理論和實驗研究[D];西安電子科技大學(xué);2007年

3 王守國;離子注入制備4H-SiC器件及其溫度特性研究[D];西安電子科技大學(xué);2004年

相關(guān)碩士學(xué)位論文 前8條

1 王富強(qiáng);靜電感應(yīng)晶體管的研究與仿真[D];蘭州交通大學(xué);2015年

2 張琳嬌;小功率射頻靜電感應(yīng)晶體管的設(shè)計[D];蘭州大學(xué);2014年

3 朱延超;小功率音頻靜電感應(yīng)晶體管的特性研究[D];蘭州大學(xué);2014年

4 谷楊;基于碳化硅肖特基二極管的逆變器的研究[D];西安電子科技大學(xué);2012年

5 張超;SiC高功率MOSFET實驗研究[D];西安電子科技大學(xué);2012年

6 任麗麗;凹柵4H-SiC SIT的結(jié)構(gòu)優(yōu)化和特性研究[D];西安電子科技大學(xué);2010年

7 鄭慶立;大功率碳化硅PiN二極管擊穿特性的模擬研究[D];西安電子科技大學(xué);2010年

8 楊濤;大功率靜電感應(yīng)器件的研制[D];蘭州大學(xué);2008年

，

本文編號：1847517