本文選題：CMOS射頻接收集成電路 + 多帶寬頻點(diǎn)濾波器帶寬校準(zhǔn)　； 參考：《國(guó)防科學(xué)技術(shù)大學(xué)》2015年博士論文

【摘要】：射頻無線通信技術(shù)的誕生和發(fā)展帶來了人類社會(huì)信息化程度的高度發(fā)達(dá),作為底層技術(shù)支撐器件,射頻集成電路一直是該領(lǐng)域內(nèi)的研究熱點(diǎn)。本文的關(guān)注點(diǎn)集中在CMOS射頻接收集成電路上,立足于通信需求、架構(gòu)需求、頻率需求以及鏈路預(yù)算需求四個(gè)方面,深入地挖掘了在射頻接收集成電路設(shè)計(jì)時(shí)需要解決的關(guān)鍵技術(shù)問題,并提出最優(yōu)化解決方案。本文所述之關(guān)鍵技術(shù)可概括如下:1)在考慮寄生效應(yīng)的情況下,詳細(xì)總結(jié)了寬帶射頻接收機(jī)匹配電路的各種設(shè)計(jì)方法和設(shè)計(jì)過程,并給出窄帶射頻接收機(jī)同時(shí)實(shí)現(xiàn)功率匹配和噪聲匹配的設(shè)計(jì)方法和步驟;2)針對(duì)窄帶射頻接收機(jī),提出了基于LC諧振頻率較準(zhǔn)以及Q增強(qiáng)技術(shù)的高線性射頻前端設(shè)計(jì)方法;3)針對(duì)寬帶多帶寬頻點(diǎn)通信系統(tǒng),提出了一種基于搜索比較算法的濾波器帶寬較準(zhǔn)電路,增加了濾波器調(diào)諧帶寬的自由度,減小了濾波器的設(shè)計(jì)復(fù)雜度,并節(jié)省了芯片面積;4)針對(duì)零中頻架構(gòu)射頻接收機(jī),提出了數(shù)字輔助靜態(tài)直流偏移較準(zhǔn)和數(shù)字域動(dòng)態(tài)直流偏移較準(zhǔn)相結(jié)合的直流偏移消除方法,可以快速高效的校準(zhǔn)由于接收機(jī)自身以及外部干擾所引起的直流偏差,確保接收機(jī)正常工作;5)針對(duì)低中頻架構(gòu)射頻接收機(jī),提出了基于恒定噪聲功率譜密度的自適應(yīng)I/Q通路失配較準(zhǔn)算法以提高接收機(jī)的鏡象抑制比;6)針對(duì)寬范圍頻率綜合器,給出了保證鎖相環(huán)環(huán)路帶寬及環(huán)路穩(wěn)定性的一般性設(shè)計(jì)方法,并提出了基于誤差補(bǔ)償?shù)念l率綜合器快速鎖定設(shè)計(jì)方法;7)針對(duì)接收機(jī)鏈路預(yù)算,提出了一種基于無失真動(dòng)態(tài)范圍的鏈路預(yù)算方法,可以對(duì)各模塊的噪聲系數(shù)和線性性能指標(biāo)進(jìn)行準(zhǔn)確的預(yù)估和分配。同時(shí),通過兩個(gè)應(yīng)用案例,三個(gè)設(shè)計(jì)實(shí)例來驗(yàn)證所述之關(guān)鍵技術(shù),三款設(shè)計(jì)實(shí)例分別采用寬帶-零中頻架構(gòu),窄帶-低中頻架構(gòu)的設(shè)計(jì)策略來驗(yàn)證相應(yīng)的關(guān)鍵技術(shù),通信系統(tǒng)分別針對(duì)DVB-S/S2ABS-S,多模GNSS。同時(shí)每個(gè)設(shè)計(jì)實(shí)例自成體系,內(nèi)容從系統(tǒng)級(jí)到模塊級(jí)再到最終的測(cè)試,為實(shí)際接收機(jī)的設(shè)計(jì)提供借鑒。
[Abstract]:The birth and development of radio frequency wireless communication technology has brought a high degree of information development in human society. As the underlying technology support device, RF integrated circuit has been a research hotspot in this field. The focus of this paper is on CMOS RF receiver integrated circuits, based on four aspects: communication requirements, architecture requirements, frequency requirements and link budget requirements. The key technical problems needed to be solved in the design of RF receiver integrated circuits are deeply explored, and the optimization solutions are put forward. The key techniques described in this paper can be summarized as follows: (1) considering the parasitic effect, the various design methods and design process of the matching circuit for wideband radio frequency receiver are summarized in detail. The design method and step of realizing both power matching and noise matching for narrowband RF receiver are given. In this paper, a high linear RF front-end design method based on LC resonance frequency accuracy and Q enhancement technique is proposed. For broadband multi-bandwidth frequency point communication system, a filter bandwidth quasi-circuit based on search comparison algorithm is proposed. The degree of freedom of filter tuning bandwidth is increased, the complexity of filter design is reduced, and the chip area is saved. In this paper, a digital auxiliary static DC offset is proposed, which combines the digital auxiliary static DC migration with the digital domain dynamic DC offset. It can quickly and efficiently calibrate the DC offset caused by the receiver itself and the external interference. To ensure the normal operation of the receiver, an adaptive I / Q path mismatch algorithm based on constant noise power spectral density is proposed to improve the receiver's image rejection ratio (RRR) 6) for a wide range frequency synthesizer, a novel adaptive I / Q channel mismatch algorithm based on constant noise power spectral density is proposed. A general design method to guarantee the bandwidth and stability of the PLL loop is given, and a fast locking design method of frequency synthesizer based on error compensation is proposed. A link budget method based on the dynamic range of distortion is proposed, which can accurately estimate and allocate the noise coefficient and linear performance index of each module. At the same time, through two application cases, three design examples to verify the key technology, three design examples of wideband-zero intermediate frequency architecture, narrow band-low intermediate frequency architecture design strategy to verify the corresponding key technologies, The communication system is aimed at DVB-S / S 2 ABS-S and multi-mode GNSS respectively. At the same time, each design example has its own system, from system level to module level to final test, which provides reference for the design of actual receiver.
【學(xué)位授予單位】：國(guó)防科學(xué)技術(shù)大學(xué)
【學(xué)位級(jí)別】：博士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN432

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 李松亭;李建成;谷曉忱;莊釗文;;Dual-band RF receiver for GPS-L1 and compass-B1 in a 55-nm CMOS[J];Journal of Semiconductors;2014年02期

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本文編號(hào)：1806658