發(fā)布時間：2018-04-14 16:10

  本文選題：SiC + JFET　； 參考：《西安電子科技大學(xué)》2015年碩士論文

【摘要】：SiC JFET功率器件憑借其優(yōu)良的材料特性及結(jié)構(gòu)優(yōu)勢,成為目前最有發(fā)展前景的高溫器件,但其工作時存在的熱可靠性問題仍然限制著目前SiC JFET器件的工作溫度。針對這個問題,本論文著重研究了SiC JFET器件在靜態(tài)工作時的溫度特性和動態(tài)雪崩模式工作下的熱可靠性。通過分析SiC JFET的熱穩(wěn)定性發(fā)現(xiàn),當(dāng)器件的產(chǎn)生功率等于相應(yīng)條件下的耗散功率時,器件達(dá)到熱平衡狀態(tài)。器件只有處在穩(wěn)定的平衡點(diǎn)時,才能可靠的工作,一旦跳到非穩(wěn)定平衡點(diǎn),器件則極有可能發(fā)生熱失效。器件在工作時存在自熱效應(yīng),且內(nèi)部溫度分布不均,高溫主要分布在溝道區(qū)域。仿真發(fā)現(xiàn),自熱效應(yīng)會使器件結(jié)溫升高,從而出現(xiàn)熱可靠性問題,并且結(jié)溫升高會引起載流子遷移率下降,從而導(dǎo)致器件電流發(fā)生退化,嚴(yán)重時退化程度達(dá)30%以上。此外,隨著器件偏壓的增大,電流密度會達(dá)到一個最大值,對應(yīng)的工作點(diǎn)稱為臨界點(diǎn),器件在高于臨界電壓的偏壓下工作,不會得到任何性能上的改善,因此器件工作時壓降應(yīng)保持在臨界電壓以內(nèi)。仿真分析發(fā)現(xiàn),增大柵壓,器件的電流能力提高,并且臨界電壓和臨界結(jié)溫也會相應(yīng)降低,器件熱可靠性得到改善。而環(huán)境溫度升高及散熱條件變差時,會導(dǎo)致相同偏壓下器件的電特性和熱穩(wěn)定性變差。因此,對于給定的器件,在高溫工作時,其性能和熱穩(wěn)定性難免發(fā)生退化,但可以通過合理地提高柵偏置和改善散熱來彌補(bǔ)性能的退化和提升器件的熱可靠性。本文還重點(diǎn)研究了兩個結(jié)構(gòu)參數(shù)對SiC JFET器件的正向特性及結(jié)溫的影響,分析得出,合理的增大溝道寬度和降低漂移層寬度,一方面能夠在較小的偏壓下顯著地提高器件的電流密度,從而成倍地減小器件面積,降低成本,另一方面在保持相同的電流密度下,可以減小器件的正向壓降,降低器件的結(jié)溫,從而降低器件的功耗和提升器件的熱可靠性。分析溫度對閾值電壓的影響發(fā)現(xiàn),SiC JFET器件閾值電壓隨溫度的增大線性降低,變化率約為1.8~2mV/K,但通過合理的設(shè)計(jì),可以使溫度對SiC JFET器件閾值電壓的影響忽略不計(jì),從而避免器件因溫度升高引起的誤導(dǎo)通現(xiàn)象。通過對不同條件下器件的雪崩仿真發(fā)現(xiàn),負(fù)載電感的增大和初始雪崩電流的增大都會明顯增大器件的雪崩持續(xù)時間,并且會一定程度上增大器件的雪崩電壓,從而引起器件瞬時功率和雪崩能量的增大,導(dǎo)致器件結(jié)溫上升更嚴(yán)重,從而引起可靠性問題。當(dāng)電感或初始雪崩電流增大到一定程度時,器件會發(fā)生熱失效。仿真分析得到1500K為器件材料所能承受的理論極限溫度,而實(shí)驗(yàn)發(fā)現(xiàn),實(shí)際器件的熱可靠性還與其電極及封裝材料的熱穩(wěn)定性密切相關(guān)。因此,器件在使用時,應(yīng)注意相應(yīng)條件下電感負(fù)載和雪崩初始電流的最大限制,以保證器件安全可靠的度過雪崩工作模式。本論文的研究無論是對給定器件的使用,還是新器件的設(shè)計(jì),均具有重要的指導(dǎo)意義。
[Abstract]:SiC JFET power device with its excellent material properties and structural advantages, become the most promising high temperature devices, but the thermal reliability problems existing in the work of the current SiC JFET devices still limit working temperature. To solve this problem, this paper focuses on the thermal reliability of temperature characteristic and dynamic avalanche mode SiC JFET in the static working device. Through the analysis of thermal stability of SiC JFET found that when the device has power dissipation power is equal to the corresponding conditions, the device thermal balance. Balance device only in a stable, can work reliably, jump to unstable equilibrium point, there is a great device possible thermal failure. Devices are self heating effect at work, and the internal temperature of the uneven distribution of temperature is mainly distributed in the channel region. Simulation shows that the self heating effect will cause the junction temperature Thus increased thermal reliability problems, and the increase of junction temperature will cause the carrier mobility decreases, resulting in device current degradation, severe degradation degree was more than 30%. In addition, with the increase of device bias, current density will reach a maximum value, the corresponding point is called the critical point, the device in bias higher than the threshold voltage, will not get any performance improvement, so the device pressure should be maintained at less than the critical voltage. The simulation results indicate that the increase of the gate voltage, increasing the current capacity of the device, and the threshold voltage and the critical temperature will be reduced accordingly, thermal reliability are improved. And the environmental temperature and heat dissipation conditional difference, cause the electrical properties and thermal stability of the device under the same bias variation. Therefore, for a given device, working under high temperature, the properties and thermal stability will inevitably happen retreat But, can increase the gate bias and improve heat dissipation to compensate the thermal reliability of lifting device degradation and performance. This paper also focuses on the effects of positive characteristics and the junction temperature of the two structural parameters on SiC JFET device analysis, a reasonable increase of the channel width and reduce the width of the drift layer, on the one hand can significantly improve the current density of the device in the smaller bias, thereby greatly reduce device area, reduce the cost, on the other hand, maintain the same current density, the device can reduce the forward voltage drop, reduce the junction temperature of the device, thereby reducing power consumption and improve the thermal reliability analysis of temperature influence on devices. The threshold voltage, the threshold voltage of SiC JFET device with increasing linear temperature decreased, the change rate is about 1.8~2mV/K, but through reasonable design, can make the temperature value of the threshold voltage on SiC JFET devices Effect is negligible, so as to avoid the device due to temperature rise caused by the misleading phenomenon. Through the simulation of different conditions by an avalanche device that increases the load inductance and the increase of the initial avalanche current will significantly increase the duration of avalanche device, and avalanche voltage of the device to a certain extent increase, causing an increase in the instantaneous power device and the avalanche energy, causing the junction temperature rise is more serious, causing reliability problems. When the inductance or initial avalanche current increases to a certain extent, the device will heat failure. The simulation results for the theoretical limit temperature of 1500K can withstand the device material, and the experiments showed that the thermal stability of practical device but also its reliability the electrode and the packaging materials are closely related. Therefore, the device is in use, should pay attention to the maximum limit under the corresponding conditions and initial avalanche current inductive load, In order to ensure safe and reliable avalanche work mode, the research of this paper has important guiding significance for both the use of given devices and the design of new devices.

【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號】：TN304.24;TN386

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 陳剛;柏松;李峗;陶然;劉奧;楊立杰;陳堂勝;;高壓SiC JFET研究進(jìn)展[J];固體電子學(xué)研究與進(jìn)展;2013年03期

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本文編號：1750052