本文選題：碳化硅 + RSD�。� 參考：《華中科技大學(xué)》2015年碩士論文

【摘要】：碳化硅(Si C)是新型寬禁帶半導(dǎo)體材料,具有寬帶隙、高熱導(dǎo)率、高電子飽和速度、高臨界擊穿場(chǎng)強(qiáng)等優(yōu)點(diǎn)。用Si C材料制作功率半導(dǎo)體器件相對(duì)于傳統(tǒng)Si基器件具有更高的耐壓、更低的導(dǎo)通電阻和功率損耗、更強(qiáng)的散熱能力等優(yōu)勢(shì)。在Si C材料的各種結(jié)構(gòu)中,4H-Si C具有更高的載流子遷移率和更低的各向異性,應(yīng)用更為廣泛。反向開關(guān)晶體管RSD(Reversely Switched Dynistor)是專門應(yīng)用于脈沖功率領(lǐng)域的半導(dǎo)體開關(guān),相對(duì)其他脈沖功率領(lǐng)域的開關(guān)器件具有通流能力強(qiáng)、di/dt耐量高、開通速度快和易于串聯(lián)等優(yōu)點(diǎn)。采用Si C材料制作RSD器件可望進(jìn)一步提高器件的阻斷電壓和電流密度,減小高耐壓情況下的導(dǎo)通損耗,更有利于高壓和重復(fù)頻率應(yīng)用。目前,在Si C功率器件的工藝制作領(lǐng)域仍然存在諸多難點(diǎn),例如刻蝕技術(shù)、離子注入、P型歐姆接觸制作的問(wèn)題。本文主要研究4H-Si C RSD器件的制作工藝,并對(duì)Si C材料的工藝難點(diǎn)進(jìn)行了探索。重點(diǎn)研究了4H-Si C材料的關(guān)鍵加工工藝之一——刻蝕工藝。采用感應(yīng)耦合等離子體刻蝕(Inductively Coupled Plasma,ICP)方法,CF4/O2混合氣體作為刻蝕氣體,用正交實(shí)驗(yàn)的方法系統(tǒng)研究了ICP功率、RF功率、CF4流量、O2流量等工藝參數(shù)對(duì)4H-Si C材料刻蝕速率的影響,結(jié)果表明刻蝕速率隨ICP功率和RF功率的增大而增大,隨CF4流量先減小后增大,隨O2流量先增大后減小。獲得了最大的刻蝕速率213.47nm/min并測(cè)得其表面均方根粗糙度(RMS)為0.724nm,保證了較好的表面質(zhì)量。設(shè)計(jì)并初步探索了4H-Si C RSD器件的全套工藝流程。實(shí)驗(yàn)前期進(jìn)行了外延片結(jié)構(gòu)設(shè)計(jì)、工藝流程設(shè)計(jì)和光刻版制定;然后在外延片基礎(chǔ)上,進(jìn)行了光刻、磁控濺射、金屬剝離、ICP刻蝕、離子注入及退火、歐姆接觸制作等一系列工藝步驟,對(duì)關(guān)鍵參數(shù)如曝光時(shí)間、顯影時(shí)間、磁控濺射條件、剝離時(shí)間、離子注入能量及劑量、退火條件等進(jìn)行了探索。最后提出了臺(tái)面正斜角工藝以改善器件阻斷特性,初步制得正向阻斷電壓約為600V的器件,為器件工藝的進(jìn)一步完善和優(yōu)化打下了基礎(chǔ)。
[Abstract]:Silicon carbide (sic) is a new wide band gap semiconductor material with wide band gap, high thermal conductivity, high electron saturation rate and high critical breakdown field strength.Compared with the traditional Si based devices, the fabrication of power semiconductor devices with sic has the advantages of higher voltage, lower on-resistance and power loss, stronger heat dissipation and so on.4H-Si C has higher carrier mobility and lower anisotropy among the various structures of sic materials, so it is more widely used.The reverse switching transistor (RSD(Reversely Switched Dynistor) is a semiconductor switch which is specially used in the field of pulse power. Compared with other switching devices in the field of pulse power, it has the advantages of high current capacity, high throughput, high turn-on speed and easy to be connected in series.Using sic to fabricate RSD devices is expected to further increase the blocking voltage and current density, reduce the on-loss at high voltage, and be more favorable to the application of high voltage and repetition frequency.At present, there are still many difficulties in the fabrication of sic power devices, such as etching technology and the fabrication of ion implanted P-type ohmic contacts.In this paper, the fabrication process of 4H-Si C RSD devices is studied, and the process difficulties of sic materials are explored.The etching process, one of the key processing technology of 4H-Si C material, is studied emphatically.The inductively coupled Coupled plasma-ICP method is used to etch the mixed gas of CF4 / O2 as etching gas. The influence of ICP power, RF power and flow rate of CF4 on the etching rate of 4H-Si C is systematically studied by orthogonal experiment.The results show that the etching rate increases with the increase of ICP power and RF power, decreases firstly with the flow rate of CF4 and then increases with the flow rate of O2.The maximum etching rate (213.47nm/min) was obtained and the RMS of the surface RMS was 0.724 nm, which ensured the better surface quality.The complete process of 4H-Si C RSD device is designed and preliminarily explored.In the early stage of the experiment, the structure design, process design and lithography were carried out, and then the lithography, magnetron sputtering, metal stripping ICP etching, ion implantation and annealing were carried out on the basis of the epitaxial wafer.The key parameters such as exposure time, development time, magnetron sputtering condition, stripping time, ion implantation energy and dose, and annealing conditions were investigated.At last, a positive diagonal technique is proposed to improve the blocking characteristics of the device, and the device with a forward blocking voltage of about 600V is obtained, which lays a foundation for the further improvement and optimization of the device process.
【學(xué)位授予單位】：華中科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN304.24

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