發(fā)布時(shí)間：2018-04-03 17:09

  本文選題：頻率合成　切入點(diǎn)：DDS　出處：《南京航空航天大學(xué)》2015年碩士論文

【摘要】：雷達(dá)目標(biāo)模擬器因其能夠克服外場(chǎng)試驗(yàn)成本高、周期長(zhǎng)且回波參數(shù)難以控制的缺點(diǎn)而得到廣泛研究與應(yīng)用。隨著現(xiàn)代雷達(dá)系統(tǒng)日趨復(fù)雜,功能更加完備,對(duì)目標(biāo)模擬器的頻率合成器提出了越來(lái)越高的要求。結(jié)合具體項(xiàng)目需要,本文針對(duì)5GHz~9GHz寬帶、小步進(jìn)、低相噪、低雜散微波頻率合成器進(jìn)行了論證實(shí)現(xiàn)。本文主要工作如下:(1)討論了直接頻率合成(DS)、鎖相環(huán)頻率合成(PLL)、直接數(shù)字頻率合成(DDS)以及混合頻率合成這幾種主流頻率合成技術(shù)的基本原理和優(yōu)缺點(diǎn),結(jié)合本課題捷變頻的要求,最終確定系統(tǒng)方案為DDS+PLL環(huán)外混頻的頻率合成方式。(2)根據(jù)系統(tǒng)方案,采用AD9912芯片,設(shè)計(jì)了DDS電路,輸出頻率范圍150~400MHz,最小頻率步進(jìn)250Hz,輸出功率3dBm,相位噪聲典型值為-116dBc/Hz@10KHz。(3)根據(jù)系統(tǒng)方案,采用ADF4350和ADF4107等芯片,設(shè)計(jì)了多個(gè)PLL電路,輸出頻率分別為1.4/3/4/5/6GHz,輸出功率可達(dá)10dBm,雜散抑制典型值為60d Bc。(4)利用多級(jí)放大器、倍頻器、混頻器和濾波器設(shè)計(jì)了上變頻鏈路,實(shí)現(xiàn)了5~9GHz輸出、1KHz步進(jìn)的寬帶頻率合成器。輸出功率為0dBm,相位噪聲典型值為-90dBc/Hz@10KHz,雜散抑制典型值為50dBc。
[Abstract]:Radar target simulator has been widely studied and applied because it can overcome the disadvantages of high cost, long period and difficult control of echo parameters.With the complexity of the modern radar system and the more complete function, the frequency synthesizer of the target simulator is required more and more.In this paper, 5GHz~9GHz broadband, small step, low phase noise, low spurious microwave frequency synthesizer is demonstrated and implemented.The main work of this paper is as follows: (1) the basic principles, advantages and disadvantages of direct frequency synthesis (DSN), phase-locked loop frequency synthesis (PLL), direct digital frequency synthesis (DDS) and hybrid frequency synthesis are discussed.The final scheme of the system is the frequency synthesis method of DDS PLL external mixing. According to the system scheme, the DDS circuit is designed by using AD9912 chip.The output frequency range is 150 ~ 400 MHz, the minimum frequency step is 250 Hz, the output power is 3dBm, and the typical phase noise is -116dBc / Hz @ 10KHz. 3) according to the system scheme, several PLL circuits are designed by using ADF4350 and ADF4107 chips.The output frequency is 1.4 / 3 / 4 / 5 / 6 GHz, the output power is up to 10 dBm, and the typical spurious suppression value is 60 dB c. 4) by using multistage amplifiers, frequency multipliers, mixers and filters, an up-conversion link is designed to realize the 5~9GHz output 1kHz step broadband frequency synthesizer.The output power is 0 dBm, the typical phase noise is -90 dBc / Hz @ 10kHz, and the spurious suppression is 50 dBc.
【學(xué)位授予單位】：南京航空航天大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN955;TN74

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本文編號(hào)：1706131