本文選題：分數(shù)分頻　切入點：高可靠　出處：《上海交通大學》2015年碩士論文　論文類型：學位論文

【摘要】：在衛(wèi)星測控通信應用中,頻率綜合器常作為星載測控應答機射頻收發(fā)機的射頻本振。傳統(tǒng)的整數(shù)分頻頻率綜合器頻率分辨率與接收頻點精度要求之間存在差距,影響了射頻接收機對接收本振頻點的適應性。設計一種具有一定空間環(huán)境適應性,噪聲及雜散性能較好的分數(shù)分頻頻率綜合器對解決當前星載測控應答機頻點適應性,提高其設計穩(wěn)定和調試效率具有重要意義。本文介紹了頻率綜合器基本原理、空間環(huán)境適應性設計基本原則和分數(shù)分頻鎖相環(huán)的基本理論;從鎖相式頻率綜合器噪聲和雜散抑制方法及Delta-Sigma調制器噪聲整形原理入手,設計出一種基于MASH結構DSM調制技術的分數(shù)分頻頻率綜合器。本文主要研究了頻率綜合器空間環(huán)境適應性設計及噪聲抑制方法、MASH結構的分數(shù)雜散抑制特性,并進行了相關理論推導和仿真驗證。本文最后詳細介紹了頻率綜合器的硬件設計和全數(shù)字MASH1-1-1結構的軟件設計過程,并對硬件實現(xiàn)及測試情況進行了介紹。本課題最終實現(xiàn)的頻率綜合器相位噪聲低至-83dBc/Hz@10kHz、分數(shù)雜散抑制約為-30dBc、頻率分辨率達到100Hz,硬件工作溫度范圍可達-40℃~+85℃,抗輻射總劑量達100 krad(Si),并具備一定的抗SEU能力,課題設計滿足了預期的指標要求,且易于向衛(wèi)星工程應用轉化,具有較好的應用前景。
[Abstract]:In the application of satellite TT & C communication, the frequency synthesizer is often used as the RF local oscillator of the radio frequency transceiver of the spaceborne TT & C transponder. There is a gap between the frequency resolution of the traditional integer divider frequency synthesizer and the precision requirement of the receiving frequency point. The adaptability of RF receiver to receiving local oscillator frequency point is affected. A fractional divider frequency synthesizer with certain space environment adaptability, good noise and spurious performance is designed to solve the frequency point adaptability of spaceborne TT & C transponder. It is of great significance to improve the design stability and debugging efficiency. This paper introduces the basic principle of frequency synthesizer, the basic principle of space environment adaptability design and the basic theory of fractional frequency division phase-locked loop. The noise and spurious suppression method of phase-locked frequency synthesizer and the noise shaping principle of Delta-Sigma modulator are introduced. A fractional divider frequency synthesizer based on MASH structure DSM modulation technology is designed. In this paper, the space environment adaptability design of frequency synthesizer and the noise suppression method are studied. Finally, the hardware design of the frequency synthesizer and the software design process of the full digital MASH1-1-1 structure are introduced in detail. Finally, the phase noise of the frequency synthesizer is as low as -83 dBc / Hz @ 10kHz, the fractional spurious suppression is about -30dBc, the frequency resolution is 100 Hz, and the working temperature range of hardware is -40 鈩，

本文編號：1608053