本文關(guān)鍵詞：全旋涂工藝構(gòu)建核心體系制備浮柵有機晶體管存儲器的研究　出處：《吉林大學》2017年博士論文　論文類型：學位論文

  更多相關(guān)文章： 浮柵 有機薄膜晶體管 非易失性存儲器 核心體系 全溶液旋涂工藝

【摘要】：與當前已產(chǎn)業(yè)化的無機半導體存儲器相比,基于有機半導體材料的有機存儲器因具有工藝簡單、可低溫加工、成本低、柔性應用等先天性的優(yōu)點,成為當前國際上的研究熱點之一。在多種有機存儲器中,基于浮柵結(jié)構(gòu)的有機薄膜晶體管非易失性存儲器(FG-OTFT-NVM)具有非破壞性可讀、非易失性存儲、存儲單元的單一晶體管結(jié)構(gòu)、與集成電路具有更好的兼容性等優(yōu)點,因此受到研究人員更多的關(guān)注。除了三個終端電極之外,標準的FG-OTFT-NVM器件的核心體系是由有機半導體層(也稱為有源層)、隧穿層、浮柵層和阻擋層這四層薄膜依次堆棧而成。迄今為止,FG-OTFT-NVM的研制普遍地存在以下兩個特點:(1)采用頂柵結(jié)構(gòu)制備FG-OTFT-NVM的報道很少,相比于底柵結(jié)構(gòu),頂柵結(jié)構(gòu)的FG-OTFT-NVM因上層的絕緣層和柵電極對有機半導體層的自封裝作用,能顯著提升存儲器的貯存和使用壽命;(2)在絕大數(shù)已報道的FG-OTFT-NVM器件中,其核心體系中至少有一層或二層的功能性薄膜采用了高真空、高成本、高能耗的傳統(tǒng)半導體工藝方法制備,不僅在很大程度上抵消了FG-OTFT-NVM自身擁有的制備工藝簡單、可低溫加工、成本低、柔性應用等方面優(yōu)勢,還因為不同制備工藝技術(shù)的切換,中斷了器件制備的連續(xù)性。在本論文研究中,我們立足于FG-OTFT-NVM自身的先天性優(yōu)勢,提出并開展了采用全溶液旋涂工藝制備由多層薄膜堆棧構(gòu)建的核心體系的頂柵結(jié)構(gòu)的FG-OTFT-NVM的研究工作。首先,我們開展了相關(guān)的實驗工作,論證了全溶液旋涂方式制備FG-OTFT-NVM的核心體系的工藝兼容性。選用p型的聚合物半導體P3HT作為存儲器的有源層,以聚合物PS混合小分子半導體TIPS-Pen分別作為浮柵層,選用聚合物PMMA作為隧穿層和阻擋層,制備了頂柵結(jié)構(gòu)的FG-OTFT-NVM,提取了存儲器的各項性能參數(shù),并分析了器件的存儲工作機制。針對于采用p型聚合物半導體制備的FG-OTFT-NVM器件所呈現(xiàn)的問題:即,單一的空穴在寫入/擦除電壓操作下,被存儲于浮柵或從浮柵層被排除,而導致的存儲器的讀取電壓不能設定為0 V,相應的存儲性能參數(shù)相對較差。我們提出并制備了基于雙極性聚合物半導體P(NDI2OD-T2)有源層的FG-OTFT-NVM。采用全溶液旋涂工藝制備了存儲器的核心體系,優(yōu)化了浮柵層中聚合物PS和小分子半導體TIPS-Pen兩者的比例關(guān)系。實現(xiàn)了雙極性電荷(電子和空穴)分別在寫入和擦除電壓下,以過飽和覆寫的方式,被注入并存儲在浮柵層,增大了存儲器的存儲窗口,并實現(xiàn)了理想的讀取電壓VR=0V,延長了電荷存儲保持時間。制備的存儲器的整體性能參數(shù)與當前階段國際上已報道的處于領(lǐng)先水平的同類器件相當。進一步的,我們從PS與TIPS-Pen的混合氯苯溶液,通過一次旋涂工藝制備了一體化的隧穿層/浮柵層薄膜,簡化了FG-OTFT-NVM的器件結(jié)構(gòu)和工藝制備流程,進一步突出了在工藝制備和成本方面的優(yōu)勢。研究了一體化的隧穿層/浮柵層中PS與TIPS-Pen的比例成分對器件存儲性能參數(shù)的影響,并得到優(yōu)化的結(jié)果。基于優(yōu)化的一體化的隧穿層/浮柵層結(jié)構(gòu)的FG-OTFT-NVM,獲得了良好的存儲器性能。最后,我們分別在PES和PI柔性襯底上,采用全溶液旋涂工藝構(gòu)建存儲器的核心體系,制備了FG-OTFT-NVM,兩組柔性存儲器均現(xiàn)了明顯的非易失性存儲效果。我們的研究表明,與當前已經(jīng)產(chǎn)業(yè)化的Si基半導體的同類器件相比,能夠采用全溶液法旋涂工藝構(gòu)建器件的核心體系,實現(xiàn)FG-OTFT-NVM的制備,在可低溫和大面積制備、能耗與成本等方面呈現(xiàn)了巨大的優(yōu)勢,也揭示了FG-OTFT-NVM在柔性、可穿戴的電子器件等領(lǐng)域有廣闊的應用前景。
[Abstract]:Compared with the inorganic semiconductor memory has the industrialization of the organic semiconductor material for organic memory has the advantages of simple process based on low temperature processing, low cost, flexible application of congenital, become one of the hot spots in the world. In a variety of organic storage, organic thin film transistor, floating gate structure is not easy to be based on the volatile memory (FG-OTFT-NVM) with non destructive read, nonvolatile memory, single transistor memory cell structure, integrated circuit and has better compatibility and other advantages, so researchers have paid more attention to. In addition to the three terminal electrode, the core system of FG-OTFT-NVM standard device is composed of an organic semiconductor layer (also known as active layer), tunneling layer, floating gate layer and the barrier layer of the four layer stacking together. So far, the development of FG-OTFT-NVM generally exist in the following two characteristics: ( 1) prepared by FG-OTFT-NVM top gate structure system is rarely reported, compared to the bottom gate structure, top gate structure of the FG-OTFT-NVM because of the upper insulating layer and a gate electrode of the organic semiconductor layer from the package, can significantly improve the life of storage and use of memory; (2) FG-OTFT-NVM devices in most of the reported the core of system, at least one functional film layer or the two layer with high vacuum, high cost, high energy consumption of the conventional semiconductor process preparation, not only largely offset the FG-OTFT-NVM with its simple preparation process, low temperature processing, low cost, flexible application and other advantages, but also because the switch between different preparation technology, interrupts the continuity of device fabrication. In this study, we based on the FG-OTFT-NVM's own congenital advantage, put forward and carried out by solution spin coating by multilayer The research work of the top gate structure construction of the core system of thin film stack FG-OTFT-NVM. First, we carried out experiments, demonstrates the whole process compatibility solution spin coating method for the preparation of FG-OTFT-NVM core system. Use the P type polymer semiconductor P3HT as active layer of memory, with mixed polymer PS small molecule semiconductor TIPS-Pen were used as the floating gate layer with polymer PMMA as tunneling layer and the barrier layer, the preparation of top gate structure of the FG-OTFT-NVM, extract the performance parameters of the memory, and analyzes the working mechanism of storage devices. In view of the present on the FG-OTFT-NVM device of P type semiconductor polymer preparation problem: namely, a single hole in the write / erase voltage operation, is stored in the floating gate or from the floating gate layer is removed, and the read voltage cannot cause memory is set to 0 V, the corresponding storage performance The parameter is relatively poor. We proposed and fabricated bipolar polymer semiconductor P (NDI2OD-T2) based on the FG-OTFT-NVM. of the active layer by solution spin coating process for core system memory by optimization of the floating gate layer of PS polymer and small molecule semiconductor TIPS-Pen proportion relationship. Realized the bipolar charge (electron and hole) in writing and erasing voltage, in supersaturated overwrite mode, is injected and stored in the floating gate layer, the storage memory window, and achieve the ideal read voltage VR=0V, prolong the retention time. The charge storage performance parameter memory prepared equivalent current international similar devices have been reported in the leading level. Further, we from a mixture of Chlorobenzene in aqueous solution by PS and TIPS-Pen, by a spin coating preparation process of the integration of the tunneling layer / floating gate layer, simplified The FG-OTFT-NVM device structure and fabrication process, and further highlights in the preparation process and cost advantages. On the integration of PS and TIPS-Pen tunneling layer / floating gate layer in the proportion of components on the device storage performance parameters, and get the optimal results. The optimized integration based on cross layer / tunnel the floating gate layer structure of the FG-OTFT-NVM, the memory of good performance. Finally, we respectively in PES and PI on a flexible substrate, the core system memory by solution spin coating process, FG-OTFT-NVM prepared, two groups of flexible memory are now a nonvolatile memory effect. Our study shows that compared to similar devices with Si based semiconductor currently has industrialization, the core system can construct the spin coating device using whole solution method, the preparation of FG-OTFT-NVM, at low temperature and large area preparation, energy consumption and These aspects have shown great advantages, and also reveal the broad application prospects of FG-OTFT-NVM in the fields of flexible and wearable electronic devices.

【學位授予單位】：吉林大學
【學位級別】：博士
【學位授予年份】：2017
【分類號】：TN321.5;TP333

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