面向SystemC的軟錯(cuò)誤敏感度分析方法
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本文關(guān)鍵詞:面向SystemC的軟錯(cuò)誤敏感度分析方法 出處:《上海交通大學(xué)》2015年碩士論文 論文類型:學(xué)位論文
更多相關(guān)文章: 軟錯(cuò)誤敏感度 仿真故障注入 系統(tǒng)可靠性 SystemC模型
【摘要】:隨著半導(dǎo)體制造工藝的不斷進(jìn)步,由粒子輻射、噪聲干擾等原因引起的軟錯(cuò)誤問題日益凸顯,對(duì)電路可靠性造成了越來越嚴(yán)重的影響。在電路設(shè)計(jì)階段引入軟錯(cuò)誤率評(píng)估能有效提高電路可靠性指標(biāo),減少設(shè)計(jì)反復(fù)并節(jié)約開發(fā)成本。隨著電路設(shè)計(jì)復(fù)雜度的不斷提高以及IP復(fù)用技術(shù)的廣泛應(yīng)用,SystemC語言由于其優(yōu)越的軟硬件協(xié)同開發(fā)能力,被廣泛應(yīng)用于電子系統(tǒng)級(jí)設(shè)計(jì),進(jìn)行高層次系統(tǒng)建模與仿真驗(yàn)證。因此本文提出了一種面向SystemC電路設(shè)計(jì)的軟錯(cuò)誤敏感度分析方法。這種方法通過仿真器在系統(tǒng)運(yùn)行過程中對(duì)系統(tǒng)內(nèi)部電路節(jié)點(diǎn)進(jìn)行隨機(jī)故障注入并監(jiān)測系統(tǒng)運(yùn)行結(jié)果,以此評(píng)估系統(tǒng)軟錯(cuò)誤敏感度。首先,基于SystemC/Verilog語言等效性,通過對(duì)系統(tǒng)Verilog代碼的改寫實(shí)現(xiàn)測試電路的SystemC建模,并在Modelsim軟件環(huán)境中使用混合仿真方法驗(yàn)證系統(tǒng)功能正確性。高層次SystemC建模能有效提高系統(tǒng)運(yùn)行速度。其次,以系統(tǒng)內(nèi)模塊接口信號(hào)以及模塊內(nèi)部所有信號(hào)作為故障注入點(diǎn)能模擬絕大多數(shù)軟錯(cuò)誤現(xiàn)象,并在軟錯(cuò)誤敏感度指標(biāo)中引入模塊面積對(duì)系統(tǒng)總體軟錯(cuò)誤率的影響,可以有效提高軟錯(cuò)誤率分析精度。再者,在保證統(tǒng)計(jì)分析精度前提下,使用分層抽樣策略對(duì)故障注入樣本空間進(jìn)行壓縮,通過減少故障注入實(shí)驗(yàn)數(shù)提高仿真故障平臺(tái)的運(yùn)行效率。驗(yàn)證實(shí)驗(yàn)以基于OR1200處理器的最小系統(tǒng)的SystemC模型為測試電路,使用仿真故障注入方法以及仿真加速策略構(gòu)建故障注入平臺(tái)。在此基礎(chǔ)上,使用分層抽樣策略進(jìn)行共計(jì)約30萬次的故障注入實(shí)驗(yàn),結(jié)合系統(tǒng)架構(gòu)與統(tǒng)計(jì)數(shù)據(jù)分析系統(tǒng)各模塊軟錯(cuò)誤敏感度。數(shù)據(jù)表明系統(tǒng)中寄存器模塊對(duì)軟錯(cuò)誤最敏感,系統(tǒng)總體軟錯(cuò)誤率為0.0063。分析結(jié)果表明本文提出的軟錯(cuò)誤敏感度分析方法穩(wěn)定有效。已有軟錯(cuò)誤敏感度研究中未考慮面積因素對(duì)系統(tǒng)整體軟錯(cuò)誤率的影響,本方法具有更好的評(píng)估精確度。
[Abstract]:With the continuous progress of semiconductor manufacturing process, by particle radiation, soft error problem caused by noise and other reasons has become increasingly prominent, has caused more and more serious influence on the reliability of circuit. The introduction of soft error rate evaluation can effectively improve the circuit reliability index in the circuit design, reduce repeated design and save development costs. With the wide application of circuit the increasing complexity of design and IP reuse technology, SystemC language because of its superior hardware and software collaborative development ability, has been widely used in electronic system level design, modeling and Simulation of construction of high level verification system. So this paper presents a SystemC oriented circuit design of the soft error sensitivity analysis method. By this method the simulator in the running process of the system of internal circuit nodes and random fault injection monitoring system operation results, in order to evaluate the system software Error sensitivity. First of all, based on the SystemC/Verilog language equivalence, by rewriting on the system Verilog code to achieve the test circuit of SystemC modeling, and using the hybrid simulation method for functional correctness verification system in Modelsim software environment. The high level of SystemC can effectively improve the modeling of high speed system. Secondly, the system interface module and signal module all the internal signals as the fault injection points can simulate most of the soft error phenomenon, and the soft error sensitivity index is introduced in the module area on the soft error rate of the overall effect of the system, can effectively improve the soft error rate analysis accuracy. Furthermore, the statistical analysis of the accuracy of fault injection, the sample space is compressed using stratified sampling the strategy, by reducing the number of fault injection experiments to enhance the efficiency of simulation platform. Experiments with the OR1200 processor based on the SystemC model system for testing circuit, injection method and simulation acceleration strategy constructing fault injection platform using fault simulation. On this basis, using the stratified sampling strategy a total of about 300 thousand times the fault injection experiment, combined with the system architecture and statistical data analysis system of each module of the soft error sensitivity. The data show that register module in the system sensitive to soft errors, the system soft error rate of 0.0063. analysis results show that the soft error sensitivity analysis method proposed in this paper is stable and effective. The soft error sensitivity in the area without considering the influence factors on the soft error rate of the whole system, this method has better evaluation accuracy.
【學(xué)位授予單位】:上海交通大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2015
【分類號(hào)】:TN305
【參考文獻(xiàn)】
相關(guān)期刊論文 前1條
1 成玉;馬安國;張承義;張民選;;微體系結(jié)構(gòu)軟錯(cuò)誤易感性階段特性研究[J];電子科技大學(xué)學(xué)報(bào);2012年02期
,本文編號(hào):1373761
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