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基于恒定導(dǎo)通時(shí)間的功率因數(shù)提高方法研究

發(fā)布時(shí)間:2018-12-06 07:49
【摘要】:隨著電力電子技術(shù)的發(fā)展和創(chuàng)新,在穩(wěn)壓電源中,開關(guān)電源以其低功耗、高效率的優(yōu)勢(shì)很快的取代了線性穩(wěn)壓電源。但是在傳統(tǒng)的降壓型AC-DC開關(guān)電源的功率因數(shù)校正器中存在一個(gè)普遍的問題,輸入電壓是正弦交流信號(hào),當(dāng)輸入電壓小于輸出電壓的情況下,輸入電流不再跟隨輸入電壓的波形,輸入的電流近似等于零,這個(gè)區(qū)間為死區(qū),死區(qū)的出現(xiàn)使得功率因數(shù)的提高受到了很大影響。針對(duì)這一問題,本文利用一種新的功率因數(shù)校正技術(shù),通過添加額外的輔助繞組和兩個(gè)開關(guān)管對(duì)外圍電路進(jìn)行改善。改善后的電路會(huì)自動(dòng)的根據(jù)輸入電壓與輸出電壓的關(guān)系,將電路的工作狀態(tài)分為兩個(gè)模式。在輸入電壓大于輸出電壓時(shí),校正器會(huì)控制外圍電路工作在降壓型模式;在輸入電壓小于輸出電壓時(shí),外圍電路則工作在降壓-升壓模式,這樣就可以消除因輸入電壓過小而存在的死區(qū),輸入電流也不再是零,并且可以跟隨輸入電壓的波形。工作在降壓-升壓模式時(shí),輸入電流波形的調(diào)節(jié),是通過系數(shù)K來完成的,K是校正器內(nèi)部誤差運(yùn)放的輸出端電壓的分壓系數(shù),合理的調(diào)整系數(shù)K的大小,就能使輸入電流在兩個(gè)工作模式進(jìn)行切換時(shí)完成良好的銜接,不會(huì)出現(xiàn)電流脈沖現(xiàn)象。消除了死區(qū)的校正器,我們?cè)倮脺?zhǔn)諧振技術(shù)原理控制外部開關(guān)管的導(dǎo)通和關(guān)斷,有效的降低外圍電路功率管在導(dǎo)通時(shí)的能量損耗,設(shè)置合適的器件參數(shù),可以讓校正器的功率因數(shù)近似為1,并且外圍電路中輸入電流的高次諧波分量也能夠很好的符合IEC61000-3-2中C類準(zhǔn)則,減少對(duì)電網(wǎng)中電能的浪費(fèi)。該方法是基于恒定導(dǎo)通時(shí)間模式的降壓型變換器實(shí)現(xiàn)的,并且本文還對(duì)傳統(tǒng)的恒定導(dǎo)通時(shí)間控制電路進(jìn)行了改進(jìn)和優(yōu)化,用MOS管代替了充放電電容,根據(jù)輸入電壓自動(dòng)的調(diào)節(jié)導(dǎo)通時(shí)間,不僅節(jié)約了芯片面積,還使導(dǎo)通時(shí)間的控制更為準(zhǔn)確,去除了傳統(tǒng)電路中存在的弊端。論文對(duì)研究的改進(jìn)方法進(jìn)行了全面的理論分析,并且借助Matlab軟件對(duì)外圍電路進(jìn)行了理論驗(yàn)證,利用Cadence和Hspice等仿真工具對(duì)外圍電路和控制電路的結(jié)合做了仿真,仿真結(jié)果表明,輸入電流的波形得到了明顯的改善,所設(shè)計(jì)的改善電路達(dá)到了預(yù)期的效果,消除了開關(guān)電源中的死區(qū)。
[Abstract]:With the development and innovation of power electronics technology, switching power supply (SMPs) has replaced linear power supply with its advantages of low power consumption and high efficiency. However, there is a common problem in the traditional power factor corrector of AC-DC switching power supply. The input voltage is sinusoidal AC signal, when the input voltage is less than the output voltage, The input current no longer follows the waveform of the input voltage, and the input current is approximately equal to zero, which is the dead zone. The rise of the power factor is greatly affected by the emergence of the dead-time. To solve this problem, a new power factor correction technique is used to improve the peripheral circuits by adding additional auxiliary windings and two switches. The improved circuit will be automatically divided into two modes according to the relationship between the input voltage and the output voltage. When the input voltage is larger than the output voltage, the corrector controls the peripheral circuit to work in the step-down mode. When the input voltage is less than the output voltage, the peripheral circuit works in the voltage-boost mode, which can eliminate the dead zone because the input voltage is too small, and the input current is no longer zero, and the waveform of the input voltage can be followed. The regulation of input current waveform is accomplished by coefficient K, which is the voltage partition coefficient of output terminal voltage of the internal error amplifier of the corrector, and the reasonable adjustment coefficient K, when working in the mode of step-down and boost voltage, the input current waveform is adjusted by the coefficient K, the output voltage of the output terminal voltage of the internal error amplifier of the corrector is adjusted reasonably. The input current can be connected well when switching between the two modes without the phenomenon of current pulse. The dead-time corrector is eliminated. We use the principle of quasi resonance technology to control the turn-on and turn-off of the external switch tube, effectively reduce the energy loss of the peripheral circuit power tube when it is on, and set the appropriate device parameters. The power factor of the corrector can be approximately 1, and the high harmonic component of the input current in the peripheral circuit can well conform to the C criterion in IEC61000-3-2, and reduce the waste of electric energy in the power network. This method is based on the constant on-time mode of the step-down converter, and this paper also improves and optimizes the traditional constant on-time control circuit, and uses MOS to replace the charge-discharge capacitor. According to the input voltage, adjusting the on-time automatically not only saves the area of the chip, but also makes the control of the on-time more accurate, and eliminates the disadvantages of the traditional circuit. This paper makes a comprehensive theoretical analysis of the improved methods, and verifies the peripheral circuits with the help of Matlab software. The combination of peripheral circuits and control circuits is simulated by Cadence and Hspice. The simulation results show that. The waveform of input current is improved obviously and the designed circuit achieves the desired effect and eliminates the dead time in the switching power supply.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TM46

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