【摘要】：在當前全球能源短缺的大背景下,LED(Light Emitting Diode)作為一種新型的綠色光源,在照明領域受到了極大的關注。相對于傳統(tǒng)的照明方式,LED具有節(jié)能、環(huán)保、高效、壽命長、體積小、可靠性高等優(yōu)點。LED驅(qū)動電源的品質(zhì)直接影響了LED產(chǎn)品的可靠性,在設計的過程中,需要考慮的因素有:成本、體積、輸出功率、精度、功率因數(shù)值、效率等。另外還需要考慮調(diào)光、安全性、使用壽命等。本論文主要任務是設計一款離線反激式的LED恒流驅(qū)動IC。設計過程中,為了提高功率因數(shù),將傳統(tǒng)的反激控制器與PFC理論有機的結合起來,實現(xiàn)了帶PFC功能的離線反激式LED恒流驅(qū)動IC設計。本論文的主要工作有以下幾點:1.分析了LED驅(qū)動芯片的工作方式。提出了離線反激式LED恒流驅(qū)動芯片的架構,并推導了輸出電流方程。2.分析離線反激式LED恒流驅(qū)動芯片的各個子模塊的性能指標,選擇合理的電路結構,并利用Cadence Spectre進行仿真,使芯片的各個模塊達到所需要的指標。本文中涉及的模塊包括基準模塊、振蕩器、乘法器、DCM檢測模塊、誤差放大器。這些模塊在本文中都給出了具體的實現(xiàn)電路,并完成了仿真驗證。3.進行整體電路的仿真。在完成了各個子模塊的設計后,對芯片整體電路進行仿真。驗證了芯片的保護功能,包括:開路保護、短路保護和過溫保護。并對芯片的整體性能進行了測試,恒流精度達到±4.5%,效率達到90%以上。4.采用CSMC 0.5μm 80V BCD工藝繪制芯片版圖。在繪制過程中,對版圖進行了合理的布局布線,并考慮了匹配及干擾對芯片性能的影響。
[Abstract]:Under the background of global energy shortage, LED (Light Emitting Diode), as a new type of green light source, has received great attention in the field of lighting. Compared with the traditional lighting mode, LED has the advantages of energy saving, environmental protection, high efficiency, long life, small volume, high reliability and so on. The quality of LED drive power directly affects the reliability of LED products. Factors to be considered are: cost, volume, output power, accuracy, power factor value, efficiency and so on. Also need to consider dimming, safety, service life and so on. The main task of this thesis is to design an off-line flyback LED constant-current driven IC.. In the design process, in order to improve the power factor, the traditional flyback controller and PFC theory are combined organically to realize the design of off-line flyback LED constant-current driving IC with PFC function. The main work of this paper is as follows: 1. The working mode of LED driver chip is analyzed. The structure of an off-line flyback LED constant current drive chip is presented, and the output current equation is derived. 2. This paper analyzes the performance indexes of each sub-module of off-line flyback LED constant current drive chip, selects the reasonable circuit structure, and simulates with Cadence Spectre to make each module of the chip achieve the required targets. The modules in this paper include reference module, oscillator, multiplier, DCM detection module, error amplifier. These modules are all given in this paper the specific implementation circuit, and completed the simulation verification. 3. The whole circuit is simulated. After completing the design of each sub-module, the whole circuit of the chip is simulated. The protection functions of the chip are verified, including open circuit protection, short circuit protection and over-temperature protection. The whole performance of the chip is tested. The constant current accuracy is 鹵4.5 and the efficiency is above 90%. The chip layout is drawn by CSMC 0.5 渭 m 80V BCD process. In the process of drawing, the layout is arranged reasonably, and the influence of matching and interference on chip performance is considered.
【學位授予單位】：電子科技大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TM923.34

【參考文獻】

相關重要報紙文章 前1條

1 記者 王春;[N];科技日報;2013年

相關碩士學位論文 前1條

1 黃斌;高線性度LED恒流IC設計[D];電子科技大學;2013年

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本文編號：2307722