單級PFC反激式LED驅(qū)動電路效率的分析與研究
發(fā)布時間:2018-10-16 17:56
【摘要】:在中小功率的LED驅(qū)動領域,單級PFC反激式變換器因結(jié)構(gòu)簡單,成本低廉而得到了廣泛的應用。然而,由于這種結(jié)構(gòu)通常采用固定開通時間的方式來實現(xiàn)PFC功能,頻率變化范圍較大,特別是在輕載時頻率很高,效率低下。同時,反激式拓撲使用的變壓器原邊和副邊線圈的漏感都較大,變壓器損耗嚴重。因此研究單級PFC反激式LED驅(qū)動的效率問題顯得尤為重要。本文設計了一款基于準諧振技術的單級PFC反激式LED驅(qū)動芯片,并且同時設計了此類LED驅(qū)動常用的臨界控制模式結(jié)構(gòu)以便于兩者的對比。芯片外圍采用了原邊反饋方式,內(nèi)部主要包括谷底檢測模塊、次級電感電流過零檢測模塊、輸出電流預處理模塊、誤差放大器模塊、柵驅(qū)動模塊以及欠壓過壓等各種保護模塊。為降低芯片本身的功耗,在保證可靠性的前提下,設計的子模塊大部分都采用了低功耗設計,如減小誤差放大器的靜態(tài)功耗、合理設計過零檢測電路的放電電量、減小柵驅(qū)動電路的動態(tài)損耗等。由于要同時實現(xiàn)恒流、PFC以及準諧振功能,而它們相互關聯(lián),因此電路在各個性能之間需要進行折衷處理。本文分析了開關電源中損耗的主要來源,以及現(xiàn)今一些常用的提高效率的方法,并對比了單級PFC與兩級PFC的優(yōu)缺點。根據(jù)設計目標要求,完成了整體電路的結(jié)構(gòu)設計及效率的理論分析,設計并仿真了部分子模塊。基于TSMC_0.5μm BCD工藝對芯片進行了整體仿真,在輸入電壓85~265VAC范圍內(nèi),輸出負載為12×1W情況時,準諧振模式下LED驅(qū)動的平均效率為93.04%,臨界模式下LED驅(qū)動的平均效率為87.95%,由此可見,采用準諧振技術可以有效提高單級PFC反激式LED驅(qū)動的效率。論文還對基于準諧振技術的LED驅(qū)動在不同負載時的效率和PF進行了仿真,得到了在設計的全電壓和全負載范圍內(nèi),LED驅(qū)動的平均效率為92.5%,PF均超過0.9,從而驗證了準諧振技術在單級PFC LED驅(qū)動電路中的實用性。
[Abstract]:In the field of medium and small power LED drive, single stage PFC flyback converter is widely used because of its simple structure and low cost. However, because this kind of structure usually uses the fixed opening time to realize the PFC function, the frequency variation range is large, especially in the light load, the frequency is very high and the efficiency is low. At the same time, the leakage inductance of the primary and secondary coils of the flyback topology is larger, and the transformer loss is serious. Therefore, it is very important to study the efficiency of single stage PFC flyback LED driver. In this paper, a single-stage PFC flyback LED driver chip based on quasi-resonant technique is designed, and the critical control mode structure of this kind of LED driver is also designed to facilitate the comparison between the two. The peripheral of the chip adopts the original side feedback mode, which mainly includes the bottom detection module, the secondary inductor current zero crossing detection module, the output current preprocessing module, the error amplifier module, the gate drive module and various protection modules such as undervoltage and overvoltage. In order to reduce the power consumption of the chip itself, most of the sub-modules are designed with low power consumption, such as reducing the static power consumption of the error amplifier and reasonably designing the discharge quantity of the zero-crossing detection circuit. Reduce the dynamic loss of gate drive circuit, etc. Since the constant-current, PFC and quasi-resonant functions are to be implemented simultaneously, and they are interrelated, the circuit needs to be compromised among each performance. In this paper, the main source of loss in switching power supply and some common methods to improve efficiency are analyzed, and the advantages and disadvantages of single stage PFC and two stage PFC are compared. According to the requirements of the design goal, the structure design and efficiency analysis of the whole circuit are completed, and some sub-modules are designed and simulated. The chip is simulated based on TSMC_0.5 渭 m BCD process. When the output load is 12 脳 1W, the average efficiency of LED driver is 93.04 in quasi-resonant mode and 87.95g in critical mode, which shows that, in the range of input voltage 85~265VAC and output load of 12 脳 1W, the average efficiency of LED driver is 93.04 and 87.95g respectively. Using quasi-resonance technique can effectively improve the efficiency of single-stage PFC flyback LED drive. The paper also simulates the efficiency and PF of the LED driver based on quasi-resonance technology under different loads. It is obtained that the average efficiency of LED driver is over 0.9in the range of full voltage and full load, which verifies the practicability of quasi-resonant technique in single-stage PFC LED drive circuit.
【學位授予單位】:電子科技大學
【學位級別】:碩士
【學位授予年份】:2014
【分類號】:TM923.34
本文編號:2275181
[Abstract]:In the field of medium and small power LED drive, single stage PFC flyback converter is widely used because of its simple structure and low cost. However, because this kind of structure usually uses the fixed opening time to realize the PFC function, the frequency variation range is large, especially in the light load, the frequency is very high and the efficiency is low. At the same time, the leakage inductance of the primary and secondary coils of the flyback topology is larger, and the transformer loss is serious. Therefore, it is very important to study the efficiency of single stage PFC flyback LED driver. In this paper, a single-stage PFC flyback LED driver chip based on quasi-resonant technique is designed, and the critical control mode structure of this kind of LED driver is also designed to facilitate the comparison between the two. The peripheral of the chip adopts the original side feedback mode, which mainly includes the bottom detection module, the secondary inductor current zero crossing detection module, the output current preprocessing module, the error amplifier module, the gate drive module and various protection modules such as undervoltage and overvoltage. In order to reduce the power consumption of the chip itself, most of the sub-modules are designed with low power consumption, such as reducing the static power consumption of the error amplifier and reasonably designing the discharge quantity of the zero-crossing detection circuit. Reduce the dynamic loss of gate drive circuit, etc. Since the constant-current, PFC and quasi-resonant functions are to be implemented simultaneously, and they are interrelated, the circuit needs to be compromised among each performance. In this paper, the main source of loss in switching power supply and some common methods to improve efficiency are analyzed, and the advantages and disadvantages of single stage PFC and two stage PFC are compared. According to the requirements of the design goal, the structure design and efficiency analysis of the whole circuit are completed, and some sub-modules are designed and simulated. The chip is simulated based on TSMC_0.5 渭 m BCD process. When the output load is 12 脳 1W, the average efficiency of LED driver is 93.04 in quasi-resonant mode and 87.95g in critical mode, which shows that, in the range of input voltage 85~265VAC and output load of 12 脳 1W, the average efficiency of LED driver is 93.04 and 87.95g respectively. Using quasi-resonance technique can effectively improve the efficiency of single-stage PFC flyback LED drive. The paper also simulates the efficiency and PF of the LED driver based on quasi-resonance technology under different loads. It is obtained that the average efficiency of LED driver is over 0.9in the range of full voltage and full load, which verifies the practicability of quasi-resonant technique in single-stage PFC LED drive circuit.
【學位授予單位】:電子科技大學
【學位級別】:碩士
【學位授予年份】:2014
【分類號】:TM923.34
【共引文獻】
相關期刊論文 前1條
1 申中鴻;楊林;劉群興;蔣春旭;;一種基于多傳感器融合的LED 燈具智能調(diào)光系統(tǒng)[J];照明工程學報;2014年02期
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