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一款電流模同步升壓型DC-DC轉(zhuǎn)換器XD1407的設(shè)計(jì)

發(fā)布時(shí)間:2018-10-12 14:35
【摘要】:本論文以設(shè)計(jì)高性能芯片為目標(biāo),結(jié)合當(dāng)前需求,在以西安電子科技大學(xué)的科研項(xiàng)目“電源管理類集成電路關(guān)鍵技術(shù)的理論研究與設(shè)計(jì)”的基礎(chǔ)上,設(shè)計(jì)了一款DC-DC轉(zhuǎn)換器XD1407。論文首先對(duì)開關(guān)電源進(jìn)行了介紹,然后結(jié)合當(dāng)前市場(chǎng)情況,分析了開關(guān)電源的核心組成部分DC-DC轉(zhuǎn)換器的重要性及發(fā)展趨勢(shì);接著詳細(xì)闡述了直流轉(zhuǎn)換器的基本理論知識(shí)和工作過程,并對(duì)升壓型DC-DC轉(zhuǎn)換器的控制方式及效率進(jìn)行了仔細(xì)研究,結(jié)合本芯片的特點(diǎn),選取合適的控制方式即電流模式,同時(shí)提出了提高效率的解決方案;然后對(duì)芯片XD1407整體架構(gòu)進(jìn)行了分析與設(shè)計(jì),針對(duì)該芯片的環(huán)路穩(wěn)定性進(jìn)行系統(tǒng)性建模,推導(dǎo)了該芯片在工作時(shí)的零極點(diǎn)位置,并對(duì)本芯片的穩(wěn)定性作出了仿真驗(yàn)證;繼而對(duì)芯片XD1407的關(guān)鍵模塊進(jìn)行電路設(shè)計(jì)與仿真驗(yàn)證,驗(yàn)證結(jié)果均符合設(shè)計(jì)要求;本論文的最后一章是對(duì)芯片XD1407整體電路仿真結(jié)果的介紹。升壓型XD1407的工作頻率為500kHz,固定不變,采用峰值電流模式控制,內(nèi)置功率開關(guān)管和同步整流管,使其在應(yīng)用時(shí)外圍電路簡(jiǎn)單化,節(jié)省PCB面積;XD1407工作電壓范圍為2.5V-5V,在該工作范圍內(nèi)峰值電流為8A,帶載能力可以達(dá)到5A;芯片內(nèi)部設(shè)計(jì)了軟啟動(dòng)電路,有效防止了因輸出電壓或電感電流的過沖對(duì)芯片造成的損害;XD1407有兩種工作模式即PWM模式和輕負(fù)載模式,當(dāng)負(fù)載較小時(shí),通過檢測(cè)電感電流信息判斷該芯片工作于輕負(fù)載模式,該模式下芯片在連續(xù)工作幾個(gè)周期后,可進(jìn)入休眠狀態(tài),休眠期間,主開關(guān)管和同步管都不能導(dǎo)通,將芯片內(nèi)部大部分模塊關(guān)斷,使芯片的靜態(tài)電流降低,減小到55u A,此時(shí)導(dǎo)通損耗及開關(guān)損耗可以幾乎為零,輸出電壓開始下降。電路中通過檢測(cè)反饋電壓FB來(lái)控制輸出電壓的下降量,利用高精度比較器輸出脈沖控制信號(hào),通過邏輯電路的處理后控制芯片退出休眠狀態(tài),如此反復(fù)工作;隨著負(fù)載的逐漸增大,電感電流隨之升高,該芯片轉(zhuǎn)換為PWM工作模式,兩種工作模式之間可平滑切換,保證該芯片在整個(gè)負(fù)載范圍內(nèi)均可以得到較高的轉(zhuǎn)換效率,同時(shí)具有較小的輸出電壓紋波;通過對(duì)升壓型DC-DC轉(zhuǎn)換器的仔細(xì)研究,然后結(jié)合理論知識(shí)進(jìn)行建模分析,確定該芯片的頻率補(bǔ)償方案,通過調(diào)節(jié)相關(guān)參數(shù),利用仿真軟件選擇合適的帶寬頻率和相位裕度,使系統(tǒng)環(huán)路可以穩(wěn)定工作。XD1407內(nèi)部同時(shí)設(shè)計(jì)了多種保護(hù)機(jī)制,使芯片在輸入電壓較低、過高溫度和過高電壓等條件下不被損壞。XD1407基于某公司的0.35 u M CMOS工藝,利用Cadence軟件進(jìn)行仿真驗(yàn)證,確保仿真結(jié)果在不同的器件模型,不同電源以及溫度下均可達(dá)到設(shè)計(jì)要求。仿真驗(yàn)證的結(jié)果表明芯片的各方面性能良好,滿足了設(shè)計(jì)要求。
[Abstract]:Based on the research project of Xi'an University of Electronic Science and Technology, "theoretical research and design of power management integrated circuit", a DC-DC converter XD1407. is designed in this paper, aiming at the design of high performance chip. This paper first introduces the switching power supply, and then analyzes the importance and development trend of the DC-DC converter, the core component of the switching power supply, according to the current market situation. Then the basic theoretical knowledge and working process of DC converter are described in detail, and the control mode and efficiency of boost DC-DC converter are studied carefully. According to the characteristics of this chip, the appropriate control mode is chosen, that is, current mode. At the same time, a solution to improve efficiency is proposed, and then the overall architecture of the chip XD1407 is analyzed and designed, the loop stability of the chip is systematically modeled, and the zero pole position of the chip is deduced. The stability of the chip is verified by simulation, and then the key modules of the chip XD1407 are designed and verified, and the results meet the design requirements. The last chapter of this paper is the introduction of the overall circuit simulation results of the chip XD1407. The working frequency of the boost type XD1407 is 500kHz, which is fixed and invariable. It adopts peak current mode control, built-in power switch and synchronous rectifier, which makes the peripheral circuit simple when it is applied. The PCB area is saved, the working voltage range of XD1407 is 2.5V-5V, the peak current is 8A and the load capacity can reach 5A. XD1407 has two working modes, PWM mode and light load mode. When the load is small, it can be judged that the chip works in light load mode by detecting the information of inductance current. In this mode, the chip can be put into dormancy state after several cycles of continuous operation. During the dormancy period, the main switch tube and the synchronous tube can not be switched on, so that most of the modules inside the chip are turned off, so that the static current of the chip is reduced. When reduced to 55 U A, the conduction loss and switching loss can be almost zero, and the output voltage begins to decrease. In the circuit, the output voltage drop is controlled by detecting the feedback voltage FB, the pulse control signal is output by the high-precision comparator, and the control chip exits the dormant state after the processing of the logic circuit, so it works repeatedly. With the increasing of the load, the inductance current increases, the chip is converted to PWM mode, and the two modes can be switched smoothly, which ensures that the chip can get higher conversion efficiency in the whole load range. At the same time, it has small output voltage ripple, through the careful study of booster DC-DC converter, then combined with theoretical knowledge to model and analyze, determine the chip frequency compensation scheme, by adjusting the relevant parameters, Using the simulation software to select the appropriate bandwidth frequency and phase margin, the loop of the system can work stably. A variety of protection mechanisms are designed in XD1407 at the same time, so that the input voltage of the chip is low. XD1407 is based on a company's 0.35 u M CMOS process and is verified by Cadence software to ensure that the simulation results can meet the design requirements under different device models, different power supply and temperature. The simulation results show that the chip has good performance and meets the design requirements.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TM46

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