【摘要】：隨著電子技術(shù)的快速發(fā)展,電子工程師對(duì)測(cè)試測(cè)量?jī)x器的要求越來(lái)越高,對(duì)數(shù)字示波器而言,不僅在帶寬、采樣率、存儲(chǔ)深度這三大指標(biāo)上有了更高的要求,同時(shí),在示波器各項(xiàng)功能的發(fā)展上也要求更加全面,更多的便捷功能可以在很大程度上提高測(cè)試的效率和精度。本文對(duì)數(shù)字存儲(chǔ)示波器的硬件波形實(shí)時(shí)錄制功能和分析功能的設(shè)計(jì)與實(shí)現(xiàn)進(jìn)行了詳細(xì)的闡述,討論了本系統(tǒng)中基于DDR3的大容量存儲(chǔ)技術(shù)和分段存儲(chǔ)技術(shù)的研究與實(shí)現(xiàn),并在此基礎(chǔ)上實(shí)現(xiàn)了硬件波形實(shí)時(shí)錄制的功能;同時(shí)完成了硬件極限模板測(cè)試技術(shù)的總體方案設(shè)計(jì),并闡述了其具體的實(shí)現(xiàn)過(guò)程;且完成了以統(tǒng)計(jì)直方圖的方法對(duì)波形進(jìn)行抖動(dòng)分析的方案研究。本文完成的工作如下:1、高速大容量存儲(chǔ)技術(shù)的研究。本文介紹了DDR3的工作機(jī)制以及其在系統(tǒng)中深存儲(chǔ)功能的具體實(shí)現(xiàn),實(shí)現(xiàn)了存儲(chǔ)深度可變,且最大存儲(chǔ)深度能達(dá)到800M的大容量存儲(chǔ)功能。2、硬件波形實(shí)時(shí)錄制功能的設(shè)計(jì)。在深存儲(chǔ)技術(shù)以及分段存儲(chǔ)技術(shù)的基礎(chǔ)上,實(shí)現(xiàn)了硬件波形實(shí)時(shí)錄制功能的設(shè)計(jì),達(dá)到存取速度快、錄制幀數(shù)多、波形實(shí)時(shí)錄制的設(shè)計(jì)目標(biāo)。3、極限模板測(cè)試技術(shù)的研究。本課題以硬件的設(shè)計(jì)思想實(shí)現(xiàn)模板測(cè)試技術(shù),能夠通過(guò)創(chuàng)建波形模板的方法對(duì)異常波形進(jìn)行檢測(cè)。這種測(cè)試方法能很快地從海量波形中檢測(cè)出異常的波形,大大提高了測(cè)試效率。4、波形抖動(dòng)分析的研究。首先介紹了三維波形映射的基本原理,再根據(jù)三維數(shù)據(jù)庫(kù)與LCD波形顯示區(qū)的地址映射關(guān)系,完成了直方統(tǒng)計(jì)圖總體方案的設(shè)計(jì)。從而實(shí)現(xiàn)通過(guò)直方圖統(tǒng)計(jì)的方法分析波形的抖動(dòng)特性。
[Abstract]:With the rapid development of electronic technology, the requirements of electronic engineers for testing and measuring instruments are becoming higher and higher. For digital oscilloscopes, not only the bandwidth, sampling rate and storage depth have higher requirements, but also, In the development of oscilloscope functions, more comprehensive, more convenient functions can greatly improve the efficiency and accuracy of the test. In this paper, the design and implementation of hardware waveform real-time recording and analysis function of digital storage oscilloscope are described in detail, and the research and implementation of mass storage technology and segmented storage technology based on DDR3 in this system are discussed. On this basis, the function of real-time recording of hardware waveform is realized, and the overall scheme design of hardware limit template testing technology is completed, and the concrete realization process is described. The scheme of waveform jitter analysis by statistical histogram is completed. The work of this paper is as follows: 1, the research of high-speed and large-capacity storage technology. This paper introduces the working mechanism of DDR3 and the realization of its deep storage function in the system. The function of variable storage depth is realized, and the maximum storage depth can reach 800m. The design of real-time recording function of hardware waveform is also presented in this paper. On the basis of deep storage technology and segmented storage technology, the design of hardware waveform real-time recording function is realized, which achieves the design goal of fast access speed, more recorded frames, real-time waveform recording, and limit template testing technology. In this paper, the template testing technology is realized by the hardware design idea, and the abnormal waveform can be detected by creating the waveform template. This method can quickly detect abnormal waveforms from massive waveforms and greatly improve the efficiency of testing .4. the research of waveform jitter analysis. Firstly, the basic principle of 3D waveform mapping is introduced, and then according to the address mapping relationship between 3D database and LCD waveform display area, the overall scheme of straight square statistical diagram is designed. Thus, the jitter characteristics of the waveform can be analyzed by histogram statistics.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM935.37

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相關(guān)期刊論文 前1條

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本文編號(hào)：2229371