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一款寬輸入非同步恒流降壓型DC-DC芯片的設(shè)計(jì)

發(fā)布時(shí)間:2018-08-08 16:35
【摘要】:隨著微電子技術(shù)的快速進(jìn)步,電源管理芯片正朝著高性能、高效率、低功耗的方向高速發(fā)展,對(duì)各種類型電源設(shè)計(jì)以及應(yīng)用多樣化的研究也越來越活躍,以更好地滿足各種電子設(shè)備對(duì)電源性能的要求。相對(duì)于線性電源,開關(guān)電源由于其具有更高的效率以及可向負(fù)載提供大電流的特點(diǎn)而得到廣泛應(yīng)用。本論文詳細(xì)介紹了Buck型DC-DC開關(guān)電源轉(zhuǎn)換器的基本工作原理、調(diào)制模式以及環(huán)路控制方式,并在此基礎(chǔ)上設(shè)計(jì)了一款具有恒流功能的寬輸入非同步降壓型DC-DC轉(zhuǎn)換器芯片。芯片輸入范圍為10-40V,內(nèi)部具有電壓預(yù)調(diào)制電路,可以把比較高的輸入電壓轉(zhuǎn)化為芯片內(nèi)部5V左右的低電壓,給基準(zhǔn)電路模塊提供內(nèi)部電源,以降低芯片靜態(tài)功耗。內(nèi)部集成高壓功率開關(guān)管,最大輸出電流可達(dá)3A,具有過溫保護(hù)電路,保證芯片能夠在惡劣的環(huán)境下可靠地工作。采用非同步整流技術(shù),外接續(xù)流二極管,邏輯驅(qū)動(dòng)電路簡單,不需要零電流檢測(cè)電路,簡化了系統(tǒng)電路設(shè)計(jì)的復(fù)雜度,減小了芯片版圖面積,在保證較高效率的情況下,節(jié)約了系統(tǒng)成本。本論文提出了一種新穎的恒流控制設(shè)計(jì)方法,在保證恒流精度的情況下,無需外部精確的電流采樣電阻,減少芯片外圍器件以及芯片引腳,節(jié)約了系統(tǒng)成本,提高了芯片的電源轉(zhuǎn)化效率?蛇x擇工作在輸出恒流狀態(tài)或者恒壓狀態(tài),實(shí)現(xiàn)負(fù)載恒流驅(qū)動(dòng)或者恒壓驅(qū)動(dòng)。采用峰值電流模脈寬調(diào)制方式,實(shí)現(xiàn)逐周期的電流限制,提高了芯片對(duì)輸入電壓以及負(fù)載變化的瞬態(tài)響應(yīng)能力。采用自適應(yīng)斜坡補(bǔ)償技術(shù)對(duì)電流環(huán)路進(jìn)行穩(wěn)定,在占空比較小時(shí)不對(duì)采樣電壓進(jìn)行補(bǔ)償,以提高芯片的帶載能力以及瞬態(tài)響應(yīng)能力,在占空比較大時(shí)在采樣電壓上疊加一個(gè)斜坡電壓,消除電流環(huán)固有的不穩(wěn)定,避免亞斜波震蕩現(xiàn)象。芯片可工作在CCM或DCM模式,當(dāng)負(fù)載電流較大時(shí),工作在CCM模式,當(dāng)負(fù)載電流很小時(shí),可工作在Burst模式。在此模式下,當(dāng)芯片進(jìn)入休眠模式時(shí),關(guān)斷芯片大部分模塊,僅保留基本的模塊,包含基準(zhǔn)電路,振蕩器等,以減小靜態(tài)功耗,提高芯片輕載時(shí)的效率。芯片還集成了短路保護(hù),輸出過壓保護(hù),電流限制保護(hù)等功能,保證芯片在異常工作情況下實(shí)現(xiàn)自我保護(hù);0.35μm 40V BCD工藝,在Cadence軟件平臺(tái)下進(jìn)行了芯片子模塊以及系統(tǒng)整體功能的設(shè)計(jì)以及仿真驗(yàn)證。仿真結(jié)果顯示,芯片很好地實(shí)現(xiàn)了恒流恒壓功能,恒流精度達(dá)到±5%,恒壓精度達(dá)到±2%,最高效率可達(dá)94%,并最終完成了芯片的版圖設(shè)計(jì),現(xiàn)正在流片。
[Abstract]:With the rapid development of microelectronics technology, power management chips are developing rapidly towards high performance, high efficiency and low power consumption. The research on various types of power supply design and application is becoming more and more active. To better meet the requirements of various electronic equipment on power performance. Compared with linear power supply, switching power supply is widely used because of its high efficiency and high current supply to load. In this paper, the basic principle, modulation mode and loop control mode of Buck type DC-DC switching power converter are introduced in detail. Based on this, a wide input asynchronous step-down DC-DC converter chip with constant current function is designed. The input range of the chip is 10-40V, and the internal voltage premodulation circuit can convert the higher input voltage to the low voltage of about 5V inside the chip, and provide the internal power supply to the reference circuit module in order to reduce the static power consumption of the chip. The internal high voltage power switch is integrated, the maximum output current is up to 3A, and the over-temperature protection circuit is provided to ensure that the chip can work reliably in the harsh environment. Using asynchronous rectifier technology, external continuous diode, simple logic drive circuit, no need of zero current detection circuit, simplifies the complexity of the system circuit design, reduces the layout area of the chip, and ensures high efficiency. The system cost is saved. In this paper, a novel design method of constant current control is proposed. Without external accurate current sampling resistance, the chip peripheral devices and chip pins are reduced, and the system cost is saved. The power conversion efficiency of the chip is improved. Can work in the output constant current state or constant voltage state, realize the load constant current drive or constant voltage drive. The peak current-mode pulse width modulation is used to limit the current cycle by cycle, which improves the transient response of the chip to the input voltage and load variation. The adaptive ramp compensation technique is used to stabilize the current loop, and the sampling voltage is not compensated in the duty cycle, so as to improve the capacity of the chip with load and transient response. When the duty cycle is large, a slope voltage is superimposed on the sampling voltage to eliminate the inherent instability of the current loop and to avoid the phenomenon of sub-oblique wave oscillation. The chip can work in CCM or DCM mode. When the load current is large, it can work in CCM mode. When the load current is small, it can work in Burst mode. In this mode, when the chip is in dormant mode, most of the modules of the chip are turned off, only the basic modules, including the reference circuit, the oscillator, etc., are retained to reduce the static power consumption and improve the efficiency of the chip under light load. The chip also integrates the functions of short circuit protection, output overvoltage protection and current limiting protection to ensure the self-protection of the chip under abnormal working conditions. Based on 0.35 渭 m 40V BCD process, the design and simulation of the chip submodule and the whole function of the system are carried out under the Cadence software platform. The simulation results show that the chip realizes the constant current and constant voltage function very well, the constant current accuracy reaches 鹵5, the constant voltage accuracy reaches 鹵2 and the maximum efficiency reaches 94. Finally, the layout design of the chip is completed, and the chip is now flowing.
【學(xué)位授予單位】:西安電子科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2014
【分類號(hào)】:TM46

【參考文獻(xiàn)】

相關(guān)碩士學(xué)位論文 前1條

1 李嚴(yán)彥;電流型DC-DC變換器研究設(shè)計(jì)[D];西安電子科技大學(xué);2010年

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本文編號(hào):2172376

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