【摘要】：隨著電子科學(xué)技術(shù)的迅猛發(fā)展,電子信號傳輸?shù)膹?fù)雜性和多樣性的特征愈加明顯,對這些信號的測量的要求也越來越高。取樣示波器作為一種測量高速信號的儀器,利用其獨(dú)特的采樣結(jié)構(gòu),采用等效采樣的原理,能夠達(dá)到普通實(shí)時示波器的十倍以上采樣率和系統(tǒng)帶寬。本論文所設(shè)計(jì)的取樣示波器等效采樣系統(tǒng)依托同樣采用等效采樣原理進(jìn)行采樣的特性阻抗分析儀平臺。由于現(xiàn)有平臺無法進(jìn)行多通道測量,因此重新設(shè)計(jì)了多通道采集電路和差分處理電路。由于現(xiàn)有電路沒有對信號進(jìn)行濾波,因此有必要增加濾波電路。為了增加偏置處理和增益處理這兩項(xiàng)功能,設(shè)計(jì)了DAC來實(shí)現(xiàn)可由FPGA控制的偏置電路和增益電路。重新設(shè)計(jì)了系統(tǒng)的時鐘電路,提供了更穩(wěn)定的時鐘信號。在此基礎(chǔ)上,通過編寫FPGA控制程序來實(shí)現(xiàn)基于“粗延時+細(xì)延時”的等效采樣功能、平均測量功能、多通道測量功能、差分測量功能、可調(diào)偏置功能以及可變增益功能。最終取樣示波器等效采樣系統(tǒng)實(shí)現(xiàn)了順序等效采樣。采用100GSPS的等效采樣率對100MHz正弦波采樣,SNR達(dá)到了64.68d B,實(shí)現(xiàn)了對高速信號的采樣。雙通道測試時數(shù)據(jù)一致性得到改善,新加的平均測量功能、多通道測量功能、差分測量功能、可調(diào)偏置功能以及可變增益功能也得到實(shí)現(xiàn)。測試中,AD9251對100KHz,400m Vp-p正弦波信號進(jìn)行采集,信噪比SNR達(dá)到了70.16d B,總諧波失真THD為-74d B,成功實(shí)現(xiàn)了數(shù)據(jù)采集。當(dāng)前所設(shè)計(jì)的等效采樣系統(tǒng)的硬件平臺和程序已經(jīng)在最新的特性阻抗測試中得到應(yīng)用。
[Abstract]:With the rapid development of electronic science and technology, the complexity and diversity of electronic signal transmission become more and more obvious. Sampling oscilloscope is a kind of instrument for measuring high speed signal. By using its unique sampling structure and the principle of equivalent sampling, the sampling rate and system bandwidth of ordinary real time oscilloscope can be achieved by more than ten times. The sampling oscilloscope equivalent sampling system designed in this paper is based on the characteristic impedance analyzer which also adopts the principle of equivalent sampling. The multi-channel acquisition circuit and differential processing circuit are redesigned because the existing platform can not carry out multi-channel measurement. Since the existing circuits do not filter the signal, it is necessary to increase the filter circuit. In order to increase the functions of bias processing and gain processing, a DAC is designed to realize the bias circuit and gain circuit which can be controlled by FPGA. The clock circuit of the system is redesigned to provide a more stable clock signal. On this basis, the FPGA control program is written to realize the equivalent sampling function, the average measurement function, the multi-channel measurement function, the differential measurement function, the adjustable offset function and the variable gain function based on "coarse delay and fine delay". The final sampling oscilloscope equivalent sampling system realizes sequential equivalent sampling. The SNR of 100 MHz sinusoidal wave sampling can reach 64.68 dB with the equivalent sampling rate of 100GSPS, and the high speed signal can be sampled. The data consistency is improved during the two-channel testing. The new average measurement function, the multi-channel measurement function, the differential measurement function, the adjustable bias function and the variable gain function are also realized. The signal to noise ratio (SNR) is 70.16 dB, the total harmonic distortion THD is -74 dB, and the data acquisition is successful. The hardware platform and program of the current equivalent sampling system have been applied in the latest characteristic impedance test.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2014
【分類號】：TM935.38

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相關(guān)碩士學(xué)位論文 前1條

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本文編號：2137147