基于FPGA的多通道LED控制器設(shè)計(jì)與實(shí)現(xiàn)
發(fā)布時(shí)間：2018-07-13 13:16
【摘要】：目前,嵌入式應(yīng)用越來越廣泛,對(duì)數(shù)據(jù)處理的要求也越來越高,尤其是對(duì)大批量數(shù)據(jù)處理的速度、穩(wěn)定和可擴(kuò)展性提出新的要求。傳統(tǒng)單片機(jī)處理方式已經(jīng)遠(yuǎn)遠(yuǎn)不能滿足當(dāng)前工程應(yīng)用尤其是城市景觀燈或樓宇墻面大型LED顯示項(xiàng)目對(duì)顯示數(shù)據(jù)的要求。本控制器是基于FPGA實(shí)現(xiàn)的,功能是控制多個(gè)通道的LED燈帶的色彩變化。本設(shè)計(jì)完成兩個(gè)部分,一個(gè)是上位機(jī)軟件開發(fā),另一個(gè)是硬件邏輯功能設(shè)計(jì)。軟件設(shè)計(jì)通過在PC機(jī)上Microsoft Visual C++6.0開發(fā)環(huán)境下應(yīng)用Open CV開發(fā)MFC應(yīng)用程序,程序?qū)崿F(xiàn)了LED燈的布局布線、動(dòng)畫設(shè)計(jì)、LED燈變化方式以及按既定格式進(jìn)行數(shù)據(jù)輸出,還能手動(dòng)編輯和修改在線動(dòng)畫效果等等。硬件設(shè)計(jì)則是通過以FPGA為核心板,添加外圍硬件電路,根據(jù)功能劃分分別進(jìn)行邏輯設(shè)計(jì),并使用Verilog HDL語言作為開發(fā)語言進(jìn)行代碼仿真。設(shè)計(jì)思路采用自頂向下的方式,先總體,后局部的設(shè)計(jì)方法,使設(shè)計(jì)出的控制器更具有系統(tǒng)性,也有利于資源的合理分配。本設(shè)計(jì)的開發(fā)環(huán)境和仿真環(huán)境為QuartusⅡ11.0+Modelsim SE 10.0c,采用核心為Altera公司推出的EP4CE6F17C8的開發(fā)板。針對(duì)獨(dú)立模塊,全部采用三段式狀態(tài)機(jī)寫法進(jìn)行分級(jí)代碼設(shè)計(jì)和調(diào)試,完成了利用SPI數(shù)據(jù)協(xié)議對(duì)SD卡中數(shù)據(jù)進(jìn)行讀取,完成了對(duì)外部SDRAM存儲(chǔ)器在100M速率下進(jìn)行讀寫操作,實(shí)現(xiàn)了DMX512協(xié)議發(fā)生器以及在QuartusⅡ環(huán)境中配置FIFO IP核并調(diào)試,最終通過比較輸入和輸出,驗(yàn)證并實(shí)現(xiàn)LED控制器預(yù)期功能。
[Abstract]:At present, embedded applications are becoming more and more widespread, and the demand for data processing is becoming more and more high, especially for the speed, stability and extensibility of large batch data processing. The traditional single chip processor can not meet the current engineering applications, especially the urban landscape lamps or the large LED display items on the building wall display. The requirement of data. This controller is based on FPGA. The function is to control the color change of the LED lamp band of multiple channels. The design completes two parts. One is the software development of the upper computer and the other is the hardware logic function design. The software design applies Open CV to develop MFC applications in the Microsoft Visual C ++6.0 development environment on the PC machine. Program, the program realizes the layout and wiring of the LED lamp, the animation design, the LED lamp change mode and the data output according to the established format. It can also edit and modify the online animation effect manually. The hardware design is to add peripheral hardware circuit by using FPGA as the core board, and make the logical design according to the function division, and use Verilog HDL. Language is used as the development language to simulate the code. The design idea adopts the top-down way, first overall, and then the local design method, so that the designed controller is more systematic and is beneficial to the rational allocation of resources. The design development environment and simulation environment are Quartus II 11.0+Modelsim SE 10.0c, and the core is Altera company The development board of EP4CE6F17C8 is introduced. According to the independent module, the three segment state machine is used to design and debug the code. The data of the SD card is read by the SPI data protocol, and the external SDRAM memory is read and written at the 100M rate, and the DMX512 protocol generator and the Quartus II are realized. The FIFO IP core is configured and debugged in the environment. Finally, the expected function of the LED controller is verified and implemented by comparing input and output.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM923.34;TP273
本文編號(hào)：2119499
[Abstract]:At present, embedded applications are becoming more and more widespread, and the demand for data processing is becoming more and more high, especially for the speed, stability and extensibility of large batch data processing. The traditional single chip processor can not meet the current engineering applications, especially the urban landscape lamps or the large LED display items on the building wall display. The requirement of data. This controller is based on FPGA. The function is to control the color change of the LED lamp band of multiple channels. The design completes two parts. One is the software development of the upper computer and the other is the hardware logic function design. The software design applies Open CV to develop MFC applications in the Microsoft Visual C ++6.0 development environment on the PC machine. Program, the program realizes the layout and wiring of the LED lamp, the animation design, the LED lamp change mode and the data output according to the established format. It can also edit and modify the online animation effect manually. The hardware design is to add peripheral hardware circuit by using FPGA as the core board, and make the logical design according to the function division, and use Verilog HDL. Language is used as the development language to simulate the code. The design idea adopts the top-down way, first overall, and then the local design method, so that the designed controller is more systematic and is beneficial to the rational allocation of resources. The design development environment and simulation environment are Quartus II 11.0+Modelsim SE 10.0c, and the core is Altera company The development board of EP4CE6F17C8 is introduced. According to the independent module, the three segment state machine is used to design and debug the code. The data of the SD card is read by the SPI data protocol, and the external SDRAM memory is read and written at the 100M rate, and the DMX512 protocol generator and the Quartus II are realized. The FIFO IP core is configured and debugged in the environment. Finally, the expected function of the LED controller is verified and implemented by comparing input and output.
【學(xué)位授予單位】：哈爾濱工業(yè)大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM923.34;TP273
【參考文獻(xiàn)】
相關(guān)期刊論文 前1條
1 徐欣;周舟;李楠;孫兆林;;基于DDR2 SDRAM的高速大容量異步FIFO的設(shè)計(jì)與實(shí)現(xiàn)[J];中國測(cè)試;2009年06期
，本文編號(hào)：2119499
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