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一種高精度LDO線性穩(wěn)壓器的設(shè)計(jì)

發(fā)布時(shí)間:2018-06-17 08:57

  本文選題:高精度 + 軟啟動(dòng); 參考:《西安電子科技大學(xué)》2015年碩士論文


【摘要】:隨著移動(dòng)電子設(shè)備的發(fā)展,像手機(jī)和平板電腦在全球的普及,以及未來可穿戴設(shè)備行業(yè)的興起,電源管理技術(shù)的地位越來越重要。由于模擬電路對于電源噪聲的敏感度,需要更加純凈的供電環(huán)境。LDO作為電源管理類芯片的一員,擁有結(jié)構(gòu)簡單、面積小、高電源抑制比和低功耗的優(yōu)點(diǎn),可以適用于手機(jī)等無線移動(dòng)設(shè)備,受到了越來越多的重視。而由于國內(nèi)發(fā)展時(shí)間較短,市場上的高端芯片大部分都被國外的芯片壟斷,因此,研發(fā)中國具有自主產(chǎn)權(quán)的LDO線性穩(wěn)壓器具有重要的意義。本文設(shè)計(jì)的芯片包括基準(zhǔn)電路、誤差放大器、功率調(diào)整管模塊和反饋電阻四個(gè)主要模塊,還包括一些輔助電路。在論文中介紹了LDO線性穩(wěn)壓器的基本結(jié)構(gòu)和原理,還有LDO的關(guān)鍵性能指標(biāo),根據(jù)一款經(jīng)典的LDO結(jié)構(gòu)分析了幾種性能指標(biāo)之間的折衷取舍;分析了LDO環(huán)路設(shè)計(jì)穩(wěn)定性的難點(diǎn)并且介紹了簡單的頻率補(bǔ)償方法。最后基于華虹0.35μmBCD工藝,設(shè)計(jì)了一款高精度的可調(diào)輸出電壓的LDO線性穩(wěn)壓器,輸出電壓范圍在0.8V~3.6V之間,還具有可編程的軟啟動(dòng)功能,最小啟動(dòng)時(shí)間大約100μs,可以減少啟動(dòng)時(shí)的浪涌電流,使輸入電源上的應(yīng)力大大減小;由外部偏置電源支持,輸入電壓可以低至0.9V,具有極低的dropout電壓和出色的瞬態(tài)響應(yīng),輸入電壓的壓差僅為幾十毫伏,無輸出電容或者任意輸出電容均可保證電路的穩(wěn)定性;具有power good功能,可以用來有選擇地指示VBIAS和VOUT的值;在過溫保護(hù)電路的作用下,電路的穩(wěn)定工作溫度范圍為-40℃至+125℃,遲滯功能也可以更好的保護(hù)芯片;限流保護(hù)電路在有超過設(shè)定電流流過時(shí)就會(huì)啟動(dòng),停止芯片工作,以免芯片被過大的電流燒毀。優(yōu)越的性能適合于不同類型的電源和電子設(shè)備。最后,利用Cadence spectre對電路進(jìn)行仿真,無論是前仿還是后仿均證明電路設(shè)計(jì)可以達(dá)到預(yù)期的設(shè)計(jì)目標(biāo),包括0.8V的基準(zhǔn)電壓,3.8A到5.5A的電流限制,芯片關(guān)斷溫度大約為159℃,恢復(fù)溫度大約為145℃。此外還介紹了該芯片版圖設(shè)計(jì)時(shí)所需要注意的問題以及該芯片采用的封裝,該芯片采用一種小型的QFN封裝,最后得到了一個(gè)高度緊湊的總體解決方案尺寸。本文設(shè)計(jì)的LDO線性穩(wěn)壓器精度很高,功耗較低,外圍電路簡單,節(jié)約了成本和面積,系統(tǒng)對負(fù)載的調(diào)節(jié)能力很強(qiáng),并且可以適用于不同的應(yīng)用場景,具有很高的市場價(jià)值。
[Abstract]:With the development of mobile electronic devices, such as the popularity of mobile phones and tablets in the world, as well as the rise of wearable equipment industry in the future, the status of power management technology is becoming more and more important. Because of the sensitivity of analog circuits to power noise, a purer power supply environment. LDO is needed as a member of power management chips. It has the advantages of simple structure, small area, high power rejection ratio and low power consumption. Can be applied to mobile phones and other wireless devices, has been more and more attention. Because the domestic development time is short and the high-end chips in the market are mostly monopolized by foreign chips, it is of great significance to develop LDO linear regulators with independent property rights in China. The chip designed in this paper includes four main modules: reference circuit, error amplifier, power regulator module and feedback resistor, as well as some auxiliary circuits. In this paper, the basic structure and principle of LDO voltage regulator and the key performance index of LDO are introduced. According to a classical LDO structure, the tradeoff between several performance indexes is analyzed. The design stability of LDO loop is analyzed and a simple frequency compensation method is introduced. Finally, based on Huahong 0.35 渭 m BCD process, a high precision LDO linear voltage regulator with adjustable output voltage is designed. The output voltage range is between 0.8 V and 3.6 V, and it also has programmable soft-start function. The minimum start-up time is about 100 渭 s, which can reduce the surge current and reduce the stress on the input power supply greatly. Supported by the external bias power supply, the input voltage can be as low as 0.9 V, with extremely low dropout voltage and excellent transient response. The voltage difference of input voltage is only tens of millivolts, no output capacitance or arbitrary output capacitance can guarantee the stability of the circuit; it has the function of power good, which can be used to indicate the value of VBIAS and VOUT selectively. The stable working temperature range of the circuit is -40 鈩,

本文編號(hào):2030471

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