光數(shù)字和模擬一體化繼電保護測試儀的實現(xiàn)
發(fā)布時間:2018-05-11 12:45
本文選題:繼電保護測試儀 + 計算模塊; 參考:《華北電力大學》2015年碩士論文
【摘要】:伴隨電力系統(tǒng)飛速發(fā)展而來的是對電力系統(tǒng)可靠性要求的日益提高。近年來,國內(nèi)外發(fā)生的多次嚴重電力事故對社會造成了不可估量的經(jīng)濟損失,充分暴露了電力系統(tǒng)在大電網(wǎng)背景下的脆弱。因此,如何在日益復雜的電力系統(tǒng)下進一步提高自身保護與控制能力,最大程度減少事故的發(fā)生概率,成為了至關重要的事情。繼電保護測試儀是根據(jù)國家頒布的《微型機繼電保護試驗裝置技術條件》等標準,研制出的對繼電保護裝置進行仿真、測試的儀器。其性能、仿真試驗結果的準確性將直接影響到繼電保護設備是否安全可靠。隨著我國電力事業(yè)的飛速發(fā)展,繼電保護技術的不斷提高,用戶對繼電保護測試儀也提出了更高的要求。本論文的研究內(nèi)容基于“數(shù)字繼電保護測試儀DSP系統(tǒng)的軟件開發(fā)”科技合作項目。論文的主要研究內(nèi)容如下:(1)通過閱讀大量文獻與實際操作,分析了繼電保護測試儀發(fā)展現(xiàn)狀,掌握了光數(shù)字繼電保護測試儀與模擬繼電保護測試儀的工作原理及性能特點,總結了兩種測試儀結構上的相同與不同之處。闡述光數(shù)字與模擬繼電保護測試儀一體化的實際意義,設計出一體化測試儀的整體結構;(2)通過在EMTP仿真軟件中搭建電力系統(tǒng)繼電保護常用輸電線路計算模型,研究輸出文件生成方式,編寫C++程序使得生成文件自動轉化為COMTRADE標準格式等研究內(nèi)容,實現(xiàn)了一種應用于一體化測試儀上位機基于EMTP的復合故障實時計算模塊。計算模塊與傳統(tǒng)計算、RTDS進行比較,闡述新仿真模塊的優(yōu)越性;(3)一體化測試儀下位機數(shù)字信號處理系統(tǒng)的核心是DSP。本文將對繼電保護測試儀硬件平臺結構進行優(yōu)化設計,并根據(jù)其性能要求,分析DSP芯片特性指標,選擇出適用于一體化繼電保護測試儀的DSP芯片,FPGA芯片及網(wǎng)絡芯片,并對所選取的DSP芯片外圍電路進行設計。最后通過DSP編程,驗證芯片功能;(4)設計一種應用于一體化測試儀的模擬量功率放大模塊,放大模塊由基于互補推挽式電流放大電路構成。其中電流放大電路可以實現(xiàn)根據(jù)輸出電流大小不同切換不同放大電路輸出回路的功能。并進行仿真驗證放大電路實際效果。最后根據(jù)所設計的電路,選擇電路中主要元器件型號。實現(xiàn)測試儀的模擬量功率放大模塊降低功率,減小體積,節(jié)約成本,提高效率的設計目的。
[Abstract]:With the rapid development of power system, the requirement of power system reliability is increasing day by day. In recent years, many serious electric power accidents at home and abroad have caused incalculable economic losses to the society, and have fully exposed the fragility of the power system in the context of large power grids. Therefore, how to further improve the ability of self-protection and control under the increasingly complex power system, and reduce the probability of accidents to the greatest extent, has become a crucial matter. The relay protection tester is an instrument developed to simulate and test the relay protection device according to the standard issued by the State such as the Technical conditions of the Microcomputer Relay Protection Test device and so on. Its performance and accuracy of simulation results will directly affect the safety and reliability of relay protection equipment. With the rapid development of China's power industry and the continuous improvement of relay protection technology, users have put forward higher requirements for relay protection tester. The research content of this thesis is based on "Software Development of DSP system of Digital Relay Protection Tester". The main research contents of this paper are as follows: (1) through reading a lot of documents and practical operation, this paper analyzes the present situation of relay protection tester, and grasps the working principle and performance characteristics of optical digital relay protection tester and analog relay protection tester. The similarities and differences in the structure of the two kinds of instruments are summarized. This paper expounds the practical significance of the integration of the optical digital and analog relay protection tester, and designs the integral structure of the integrated tester. The calculation model of the transmission lines commonly used for the relay protection in power system is built in the EMTP simulation software. The method of output file generation is studied, and the C program is written to automatically transform the generated file into COMTRADE standard format. A real time calculation module of complex fault based on EMTP is implemented in the host computer of integrated tester. Comparing the calculation module with the traditional RTDS, this paper expounds the superiority of the new simulation module and expounds that the core of the digital signal processing system of the lower computer of the new simulation module is the DSP3). In this paper, the hardware platform structure of relay protection tester is optimized, and according to its performance requirements, the characteristic index of DSP chip is analyzed, and the DSP chip and network chip suitable for integrated relay protection tester are selected. The peripheral circuit of the selected DSP chip is designed. Finally, through DSP programming, the function of the chip is verified. (4) A kind of analog power amplifier module is designed, which is based on complementary push-pull current amplifier circuit. The current amplifying circuit can switch the output circuit according to the output current. The actual effect of amplifier circuit is verified by simulation. Finally, according to the designed circuit, select the main components in the circuit model. The purpose of the design is to reduce the power, reduce the volume, save the cost and improve the efficiency of the analog power amplification module of the tester.
【學位授予單位】:華北電力大學
【學位級別】:碩士
【學位授予年份】:2015
【分類號】:TM774
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