本文選題：LDO + 頻率補償��； 參考：《復(fù)旦大學》2014年碩士論文

【摘要】：隨著智能手機、平板電腦、筆記本、數(shù)碼相機等電子產(chǎn)品的普及,人們對電子產(chǎn)品的便攜性、續(xù)航能力的要求也越來越高。便攜性電子產(chǎn)品的體積比較小,·因而它們所配備的電池容量也比較小。為了提高電池電量的利用效率,提高電池續(xù)航能力,需要用到電源管理技術(shù)。LDO(低壓差線性穩(wěn)壓器)作為一種電源管理產(chǎn)品,其市場份額高達26%,具有非常高的應(yīng)用價值。相對于其它線性穩(wěn)壓器,LDO能夠提高電源轉(zhuǎn)換效率,但是由于它的輸出阻抗會隨著負載發(fā)生改變,因而它存在著穩(wěn)定性的問題。為了實現(xiàn)LDO的穩(wěn)定性,LDO的頻率補償方案成為研究熱點。本文研究了LDO的基本結(jié)構(gòu)和工作原理,并將LDO幾種不同的頻率補償方案進行了分析和對比,從而選擇使用兩種頻率補償方案來實現(xiàn)LDO的設(shè)計：即壓控電流源(VCCS, Voltage Control Current Source)補償和單位增益補償單元(UGCC, United Gain Compensation Cell)補償。VCCS補償?shù)腖DO僅使用1pF的片上電容實現(xiàn)了頻率補償,UGCC補償?shù)腖DO可以應(yīng)用在低電源電壓的應(yīng)用中。本文共完成了7個LDO的設(shè)計,每個LDO均有4種不同的輸出。本文使用GF2P4M 0.35μm CMOS工藝進行設(shè)計與流片驗證,并采用4.7μF的陶瓷片外輸出電容。測試結(jié)果顯示,使用兩種補償方案的LDO在負載全幅值跳變(最大負載電流300mA)和輸入電壓發(fā)生跳變時均能保持穩(wěn)定。VCCS補償?shù)腖DO在輸出電壓為1.2V的情況下,其負載電流在100ns內(nèi)在1mA～300mA間跳變時其輸出電壓變化小于30mV。UGCC補償?shù)腖DO在輸出電壓為2.7V的情況下,其負載電流在100ns內(nèi)在1mA～300mA間跳變時其輸出電壓變化60mV、LDO環(huán)路帶寬在最大負載電流處最大,可以達到2MHz,跳變穩(wěn)定時間小于5μs。LDO的壓降電壓可以達到150mV,其電源抑制比在0.001～40 KHz內(nèi)均大于45dB。
[Abstract]:With the popularity of smart phones, tablets, notebooks, digital cameras and other electronic products, people are demanding more and more portable and sustainable electronic products. Portable electronics are smaller in size and therefore have smaller battery capacity. In order to improve the utilization efficiency of battery energy and the battery life ability, the power management technology. LDO (low voltage difference linear regulator) is used as a power management product. Its market share is as high as 26, which has a high application value. Compared with other linear regulators LDO can improve the efficiency of power conversion but its output impedance will change with the load so it has the problem of stability. In order to realize the stability of LDO, the frequency compensation scheme of LDO has become a hot research topic. In this paper, the basic structure and working principle of LDO are studied, and several different frequency compensation schemes of LDO are analyzed and compared. Therefore, two kinds of frequency compensation schemes are selected to realize the design of LDO: VCCS, Voltage Control Current Source) compensation and unit gain compensation unit. The LDO compensated by United Gain Compensation Cell) compensation .VCCS only uses the on-chip capacitor of 1pF to realize the frequency. The LDO compensated by UGCC can be used in the application of low power supply voltage. In this paper, seven LDO designs are completed, and each LDO has four different outputs. In this paper, GF2P4M 0.35 渭 m CMOS process is used to design and verify the flow sheet, and the output capacitance of 4.7 渭 F ceramic chip is used. The test results show that the LDO with two compensation schemes can maintain the stability of the LDO with the output voltage of 1.2 V when the maximum load current is 300 Ma and the input voltage jumps. The output voltage variation of 100ns is smaller than that of LDO compensated by 30mV.UGCC when the load current changes between 1mA~300mA and 30mV.UGCC. When the output voltage is 2.7 V, the output voltage changes 60mV / LDO loop bandwidth is maximum at the maximum load current when the 100ns internal 1mA~300mA jumps. The voltage drop voltage of less than 5 渭 s.LDO can reach 150mV, and the power rejection ratio is more than 45 dB in 0.001 ~ 40 KHz.
【學位授予單位】：復(fù)旦大學
【學位級別】：碩士
【學位授予年份】：2014
【分類號】：TM44

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