本文選題：同步整流 + 斜坡補(bǔ)償��； 參考：《電子科技大學(xué)》2014年碩士論文

【摘要】：便攜式電子設(shè)備朝低壓低功耗方向發(fā)展,CPU、MCU等數(shù)字處理器的集成度及工作頻率越來越高,需要電源對(duì)其供電的電流也越來越大。這就需要電源系統(tǒng)具有提供大電流和低輸出電壓能力。文章介紹了一種具有異相時(shí)鐘控制雙輸出通道、工作頻率可變(140KHz-650KHz)、內(nèi)部設(shè)定可以選擇工作頻率(250KHz、400KHz、600KHz)、輸入電壓范圍為4-40V、輸出電壓范圍為0.8-10V、重載時(shí)電源轉(zhuǎn)換效率達(dá)到90%以上、具有良好線性調(diào)整率和負(fù)載調(diào)整率、能夠適用于大電流輸出的應(yīng)用環(huán)境、使用電流模式PWM控制技術(shù)使輸入輸出電壓突變可得到快速響應(yīng)的同步整流BUCK型DC-DC轉(zhuǎn)換器芯片設(shè)計(jì)。設(shè)計(jì)上采用自上而下的設(shè)計(jì)方法,結(jié)合理論分析,從芯片整體架構(gòu)出發(fā),闡明雙通道轉(zhuǎn)換器的架構(gòu)及工作原理,并說明了采用此架構(gòu)的優(yōu)缺點(diǎn);接下來對(duì)具體通道的PWM環(huán)路控制方法進(jìn)行對(duì)比論證,提出優(yōu)化設(shè)計(jì)方案,并分析此優(yōu)化方案的環(huán)路補(bǔ)償方法;之后設(shè)計(jì)了PWM環(huán)路相關(guān)電路模塊:誤差放大器、PWM比較器、斜坡補(bǔ)償電路、振蕩器等,并對(duì)各個(gè)電路模塊仿真數(shù)據(jù)進(jìn)行分析驗(yàn)證;最后,對(duì)芯片外圍架構(gòu)及外圍主要器件的選擇進(jìn)行分析,并在此基礎(chǔ)上對(duì)芯片整體系統(tǒng)仿真數(shù)據(jù)進(jìn)行分析,給出一些主要系統(tǒng)參數(shù)的仿真數(shù)據(jù)。整體系統(tǒng)仿真數(shù)據(jù)顯示,所設(shè)計(jì)的DC-DC轉(zhuǎn)換器在輸出電壓為3.3V、輸出電流5A和輸出電壓為8.5V、輸出電流3.5A條件下,各項(xiàng)仿真參數(shù)都滿足設(shè)計(jì)要求。
[Abstract]:Portable electronic devices are developing towards low voltage and low power consumption. The integration and working frequency of digital processors such as CPU / MCU are becoming higher and higher.This requires the ability of the power system to provide high current and low output voltage.It has good linear adjustment rate and load adjustment rate, and can be used in the application environment of high current output. The design of synchronous rectifier BUCK type DC-DC converter chip can be obtained by using current-mode PWM control technology to make the input and output voltage abrupt change to obtain fast response.In the design, the top-down design method is adopted, combined with the theoretical analysis, the architecture and working principle of the dual-channel converter are expounded from the overall architecture of the chip, and the advantages and disadvantages of using this architecture are explained.Then the PWM loop control method of the specific channel is compared and demonstrated, and the optimal design scheme is put forward, and the loop compensation method of the optimization scheme is analyzed. Then, the relative circuit module of the PWM loop is designed: error amplifier and PWM comparator.The ramp compensation circuit, oscillator, etc., and the simulation data of each circuit module are analyzed and verified. Finally, the selection of the peripheral architecture and main peripheral devices of the chip is analyzed.On this basis, the simulation data of the whole chip system are analyzed, and the simulation data of some main system parameters are given.The whole system simulation data show that the designed DC-DC converter meets the design requirements at output voltage of 3.3 V, output current of 5A and output voltage of 8.5 V, and output current of 3.5A.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TM46
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本文編號(hào)：1744079