本文選題：開關(guān)磁阻電機(jī) + AVR單片機(jī)��； 參考：《華北電力大學(xué)(北京)》2017年碩士論文

【摘要】：開關(guān)磁阻電機(jī)調(diào)速系統(tǒng)(Switched Reluctance Motor Drive,SRD)是一種新型交流調(diào)速系統(tǒng)。因?yàn)槠浜唵螆?jiān)固的結(jié)構(gòu)和優(yōu)良的電氣性能,廣泛用于電氣傳動(dòng)相關(guān)領(lǐng)域。目前,開關(guān)磁阻電機(jī)調(diào)速系統(tǒng)的主流設(shè)計(jì)是以數(shù)字信號處理器(Digital Signal Processing,DSP)為核心控制芯片。比較而言,DSP整體性能優(yōu)于單片機(jī),不過DSP的成本要大于單片機(jī),并且在一些工況比較惡劣的情況下,DSP的抗干擾性相對單片機(jī)要弱一些,所需外圍抗干擾電路相對復(fù)雜,成本也會增加。綜合考慮,在某些工況下基于單片機(jī)的開關(guān)磁阻電機(jī)調(diào)速系統(tǒng)可以作為一種方案來替代基于DSP的開關(guān)磁阻電機(jī)調(diào)速系統(tǒng)。本文以工程實(shí)現(xiàn)為目的,以AVR單片機(jī)為核心,以模擬電路參與實(shí)時(shí)控制的模數(shù)混合電路來控制開關(guān)磁阻電機(jī)調(diào)速系統(tǒng)。研究并設(shè)計(jì)了22k W三相12/8的開關(guān)磁阻調(diào)速系統(tǒng)。本文首先研究開關(guān)磁阻電機(jī)的工作原理。用線性數(shù)學(xué)模型對電機(jī)進(jìn)行轉(zhuǎn)矩分析和電流分析,并研究電機(jī)的控制策略和起動(dòng)、制動(dòng)過程。最終采用PWM控制,構(gòu)建轉(zhuǎn)速電流雙閉環(huán)可逆調(diào)速系統(tǒng)。隨后,進(jìn)行硬件設(shè)計(jì)和軟件設(shè)計(jì)。在硬件設(shè)計(jì)部分,又分功率電路設(shè)計(jì)和控制電路設(shè)計(jì)。其中功率電路主要研究整流電路,逆變電路,功率半導(dǎo)體開關(guān)器件的選擇以及相應(yīng)的驅(qū)動(dòng)電路設(shè)計(jì)。在控制電路部分,因?yàn)殡娐废鄬?fù)雜,所以將電路進(jìn)行模塊化分解,用大量的電路圖來介紹相關(guān)設(shè)計(jì)。包括:單片機(jī)最小系統(tǒng),位置傳感器電路,位置信號通道,電流檢測電路,轉(zhuǎn)速電流模擬控制電路,控制信號輸出電路,電流保護(hù)電路和通訊電路。其中轉(zhuǎn)速電流模擬控制電路為本文的設(shè)計(jì)核心。在單片機(jī)相對DSP運(yùn)算較慢的情況下,為保證控制的實(shí)時(shí)性,采用了模擬電路參與控制。很大程度上避開單片機(jī)運(yùn)算速度方面的劣勢。由于有轉(zhuǎn)速電流模擬控制電路的設(shè)計(jì),所以軟件方面的復(fù)雜度就降低很多。主要為主程序,速度計(jì)算程序和需要用到的中斷程序。最后,搭建檢測平臺,檢驗(yàn)工作電流,轉(zhuǎn)矩輸出能力,功率輸出和系統(tǒng)效率。在低速和高速的條件之下與理論和設(shè)計(jì)預(yù)期相符。并在檢測分析中分析了噪聲干擾的問題,并提出濾噪的方法。為進(jìn)一步優(yōu)化設(shè)計(jì)提供了方向。
[Abstract]:Switched Reluctance Motor drive system (SRD) is a new AC speed regulation system. Because of its simple and solid structure and excellent electrical performance, it is widely used in electrical transmission related fields. At present, the main design of switched reluctance motor speed regulation system is based on digital signal processor digital Signal processing chip. Comparatively speaking, the overall performance of DSP is better than that of single chip microcomputer, but the cost of DSP is higher than that of single chip, and the anti-jamming ability of DSP is weaker than that of single chip under some bad working conditions, and the peripheral anti-jamming circuit required is relatively complex. Costs will also increase. Considering synthetically, the switched reluctance motor speed regulation system based on single chip microcomputer can be used as a scheme to replace the switched reluctance motor speed regulation system based on DSP. In this paper, the switched reluctance motor (SRM) speed control system is controlled by analog-to-digital hybrid circuit with analog circuit participating in real time control with AVR single chip microcomputer as the core. A 22 kW three-phase 12 / 8 switched reluctance speed regulating system is studied and designed. In this paper, the principle of switched reluctance motor (SRM) is studied. The torque and current of the motor are analyzed by linear mathematical model, and the control strategy and the starting and braking process of the motor are studied. Finally, using PWM control, the speed and current double closed loop reversible speed control system is constructed. Then, the hardware design and software design. In hardware design, power circuit design and control circuit design. The power circuit mainly studies the rectifier circuit, the inverter circuit, the power semiconductor switch device selection and the corresponding drive circuit design. In the part of control circuit, because the circuit is relatively complex, the circuit is decomposed by modularization, and a large number of circuit diagrams are used to introduce the related design. It includes: single chip microcomputer minimum system, position sensor circuit, position signal channel, current detection circuit, speed and current analog control circuit, control signal output circuit, current protection circuit and communication circuit. The speed and current analog control circuit is the core of this paper. In order to ensure the real time of the control, the analog circuit is used to participate in the control when the MCU is slower than DSP. To a large extent to avoid the disadvantages of single-chip computing speed. Because of the design of speed current analog control circuit, the complexity of software is reduced a lot. Mainly for the main program, speed calculation program and need to use interrupt program. Finally, the detection platform is built to test the working current, torque output ability, power output and system efficiency. Under the condition of low speed and high speed, it is in accordance with the theory and design expectation. The problem of noise interference is analyzed in the detection and analysis, and the method of noise filtering is put forward. It provides the direction for further optimization design.
【學(xué)位授予單位】：華北電力大學(xué)(北京)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TM352

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