基于FPGA的鐵路異物侵限檢測硬件平臺設(shè)計(jì)
本文選題:異物侵限檢測 + 圖像處理 ; 參考:《北京交通大學(xué)》2015年碩士論文
【摘要】:隨著我國鐵路建設(shè)的快速發(fā)展,列車運(yùn)行速度不斷提高,對列車運(yùn)行安全提出了更高的要求。目前鐵路異物侵限事故時有發(fā)生,對鐵路運(yùn)行造成巨大的人員傷亡和經(jīng)濟(jì)損失,F(xiàn)有鐵路異物侵限檢測方法存在實(shí)時性差等問題,雖然可以檢測出異物,但是如果不能及時報(bào)警,就不能避免事故發(fā)生。為了提高鐵路異物侵限檢測的實(shí)時性,本文提出了一種基于FPGA (Field Programmable Gate Array)的鐵路異物侵限檢測硬件平臺,利用FPGA技術(shù)和機(jī)器視覺進(jìn)行圖像的實(shí)時處理和分析,從而實(shí)現(xiàn)鐵路沿線異物的實(shí)時檢測。 論文首先介紹了鐵路異物侵限檢測硬件平臺的總體方案設(shè)計(jì),包括鐵路異物侵限檢測系統(tǒng)的總體網(wǎng)絡(luò)結(jié)構(gòu)、結(jié)構(gòu)組成、各部分功能以及總體算法設(shè)計(jì)。重點(diǎn)研究了硬件平臺圖像采集、圖像存儲、圖像處理和圖像傳輸4部分的結(jié)構(gòu)組成和器件選型問題?傮w算法由FPGA和ARM兩部分組成,FPGA完成異物特征參數(shù)提取和初步報(bào)警等圖像預(yù)處理,ARM完成異物的識別分類、跟蹤和報(bào)警等圖像高級處理。 接著詳細(xì)論述了鐵路異物侵限檢測硬件平臺硬件電路的總體構(gòu)成,給出了各組成單元的電路設(shè)計(jì)。在電路設(shè)計(jì)的基礎(chǔ)上,實(shí)現(xiàn)了硬件平臺的圖像采集、圖像存儲、圖像幀存控制、主從控制器間通信和PC端模擬服務(wù)器等基本功能。 為了提高異物侵限檢測的處理速度,利用Verilog硬件描述語言移植鐵路異物侵限檢測算法到FPGA硬件處理器上,實(shí)現(xiàn)了背景差分、背景更新、單次掃描連通域標(biāo)記、異物特征提取等圖像處理算法。針對異物識別、分類和跟蹤的設(shè)計(jì)要求,本文提出了單次掃描連通域標(biāo)記算法,可以在單次掃描期間完成異物多個特征參數(shù)(面積、質(zhì)心、灰度值和外接矩形)的存儲,掃描結(jié)束后提取參數(shù)給ARM。 最后,為了驗(yàn)證硬件平臺檢測異物的效果,在實(shí)驗(yàn)室室外進(jìn)行了異物檢測的初步驗(yàn)證實(shí)驗(yàn),在北京北站鐵路沿線進(jìn)行了現(xiàn)場實(shí)驗(yàn)。實(shí)驗(yàn)結(jié)果表明,參數(shù)提取正確,處理一幀圖像的時間比軟件減少50%,速度滿足實(shí)時檢測的要求。由硬件平臺系統(tǒng)驗(yàn)證結(jié)果可知,系統(tǒng)平均檢測頻率達(dá)到13幀/秒,該處理頻率符合實(shí)時檢測的要求。對于侵限異物、高危侵限趨勢異物、列車以及其他噪聲具有較好的判別效果,異物侵限檢測報(bào)警率達(dá)到88.57%。
[Abstract]:With the rapid development of railway construction in our country, the speed of train running has been improved continuously, which puts forward higher requirements for the safety of train operation. At present, railway foreign body invasion accidents occur from time to time, causing huge casualties and economic losses to railway operation. The existing detection methods of foreign body invasion in railway have some problems such as poor real-time. Although the foreign body can be detected, if the foreign body can not be alerted in time, the accident can not be avoided. In order to improve the real-time performance of foreign body intrusion detection, a hardware platform for foreign body intrusion detection based on FPGA Field Programmable Gate Arrayis proposed in this paper. The real-time image processing and analysis are carried out by using FPGA technology and machine vision. In order to realize the real-time detection of foreign bodies along the railway line. This paper first introduces the overall scheme design of the hardware platform for foreign body intrusion detection, including the overall network structure, structure, function and algorithm design of the railway foreign body intrusion detection system. In this paper, the structure and device selection of image acquisition, image storage, image processing and image transmission on hardware platform are studied. The whole algorithm is composed of FPGA and ARM to complete image preprocessing, such as extracting characteristic parameters of foreign body and initial alarm, and arm to complete the advanced processing of foreign body recognition, tracking and alarm. Then, the overall structure of the hardware circuit of the hardware platform for foreign body invasion detection is discussed in detail, and the circuit design of each component unit is given. Based on the circuit design, the basic functions of the hardware platform, such as image acquisition, image storage, image frame storage control, master-slave communication and PC analog server, are realized. In order to improve the processing speed of foreign body intrusion detection, the Verilog hardware description language is used to transplant the railway foreign body intrusion detection algorithm to the FPGA hardware processor. The background difference, background update and single scan connected domain mark are realized. Foreign body feature extraction and other image processing algorithms. Aiming at the design requirements of foreign body identification, classification and tracking, a single scan connected domain labeling algorithm is proposed, which can store multiple characteristic parameters (area, centroid, gray value and external rectangle) of foreign body during a single scan. At the end of the scan, the parameters are extracted to ARM. Finally, in order to verify the effect of foreign body detection by hardware platform, a preliminary verification experiment was carried out outside the laboratory, and a field experiment was carried out along the railway line of Beijing North Railway Station. The experimental results show that the parameter extraction is correct, the processing time of a frame image is reduced by 50% than the software, and the speed meets the requirement of real-time detection. The results of hardware platform system verification show that the average detection frequency of the system is up to 13 frames per second, and the processing frequency meets the requirements of real-time detection. For foreign body invasion, high risk trend foreign body, train and other noise has a better discrimination effect, the detection alarm rate of foreign body invasion reaches 88.57.
【學(xué)位授予單位】:北京交通大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2015
【分類號】:U298;TP391.41
【參考文獻(xiàn)】
相關(guān)期刊論文 前10條
1 張毅剛;曹陽;項(xiàng)學(xué)智;;靜態(tài)背景差分運(yùn)動目標(biāo)檢測研究[J];電子測量與儀器學(xué)報(bào);2010年05期
2 朱正平;王秀麗;岳秋菊;;基于機(jī)器視覺的軌道異物侵限檢測方法研究[J];甘肅高師學(xué)報(bào);2009年02期
3 馬宏鋒;黨建武;王宏斌;;基于SOPC的列車環(huán)境異物入侵監(jiān)測系統(tǒng)研究[J];電子設(shè)計(jì)工程;2010年08期
4 馬益杭;占利軍;謝傳節(jié);秦承志;;連通域標(biāo)記算法的并行化研究[J];地理與地理信息科學(xué);2013年04期
5 田崢;徐成;楊志邦;馮X;;智能監(jiān)控系統(tǒng)中的運(yùn)動目標(biāo)檢測算法[J];計(jì)算機(jī)工程;2011年04期
6 孫睿;;光纖布喇格光柵在高速鐵路異物侵陷監(jiān)測系統(tǒng)中的應(yīng)用研究[J];信息通信;2012年06期
7 余祖俊;王堯;朱力強(qiáng);郭保青;;多光點(diǎn)位置實(shí)時檢測系統(tǒng)及其應(yīng)用(英文)[J];控制理論與應(yīng)用;2012年12期
8 劉建斌;;基于光纖光柵傳感的鐵路異物侵限監(jiān)測系統(tǒng)研究[J];交通科技;2011年03期
9 石耀忠;;京津城際軌道交通防災(zāi)安全監(jiān)控系統(tǒng)簡析[J];鐵路通信信號工程技術(shù);2008年04期
10 陳建平;何潞;;鐵路防災(zāi)監(jiān)測雷達(dá)的應(yīng)用[J];中國鐵路;2012年03期
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