【摘要】：在IP網(wǎng)絡(luò)呈現(xiàn)出爆炸式增長(zhǎng)的今天,在因特網(wǎng)中引入QoS機(jī)制不僅為提供商提供了資源的有效管理手段,而且為用戶提供了多樣性的服務(wù),滿足不同的應(yīng)用的需要。因此,如何在網(wǎng)絡(luò)設(shè)備中集成多樣性和高可靠性的QoS功能也日趨成為目前熱門(mén)的研究課題。本文首先對(duì)目前的IP QoS的發(fā)展背景和相關(guān)技術(shù)做了簡(jiǎn)單的介紹,然后對(duì)Internet的三種服務(wù)模型Best-Effort、Intserv和Diffserv發(fā)展歷程和實(shí)現(xiàn)機(jī)制進(jìn)行了描述,并結(jié)合IP網(wǎng)絡(luò)的曲折發(fā)展過(guò)程,闡述了QoS機(jī)制在網(wǎng)絡(luò)發(fā)展中存在的必要性。接著本文重點(diǎn)描述了Broadcom公司的其中一款交換機(jī)芯片——bcm565xx的體系結(jié)構(gòu),然后說(shuō)明了集成在這款強(qiáng)大芯片上的contentaware處理器是如何提供QoS服務(wù)的。文中具體介紹了該處理器所包含的四類處理引擎:(1) lookup engine;(2) policy engine;(2) metering engine;(4)statistics engine,這四類處理引擎相互協(xié)作,前后關(guān)聯(lián),對(duì)采樣的數(shù)據(jù)進(jìn)行層層分析和篩選。處理器將根據(jù)查詢引擎的計(jì)算結(jié)果,針對(duì)最終匹配的數(shù)據(jù)產(chǎn)生一個(gè)全局唯一的索引值,并根據(jù)該索引值去獲取決策引擎中所對(duì)應(yīng)的策略,進(jìn)而利用該策略設(shè)置硬件寄存器,使得硬件能夠被正常驅(qū)動(dòng)以完成用戶的配置指令。在這之后,以實(shí)例介紹了如何利用該交換機(jī)芯片經(jīng)過(guò)二次開(kāi)發(fā),在以太網(wǎng)環(huán)境中為用戶提供多樣性的QoS服務(wù),這些QoS服務(wù)包括了用戶數(shù)據(jù)分類,擁塞避免,隊(duì)列技術(shù),流量監(jiān)管以及流量整形等等。最后論文展望了未來(lái)IP網(wǎng)絡(luò)QoS發(fā)展趨勢(shì),介紹了Hierachical QoS的相關(guān)概念和應(yīng)用方案,滿足了接入網(wǎng)絡(luò),骨干網(wǎng)絡(luò)乃至核心網(wǎng)絡(luò)的多種應(yīng)用需求。
[Abstract]:With the explosive growth of IP network, the introduction of QoS mechanism in the Internet not only provides the provider with effective management means of resources, but also provides users with a variety of services to meet the needs of different applications. Therefore, how to integrate diverse and reliable QoS functions in network devices has become a hot research topic. This paper firstly introduces the development background and related technologies of IP QoS, then describes the development history and implementation mechanism of three service models of Internet, Best-Effort,Intserv and Diffserv, and combines with the tortuous development process of IP network. This paper expounds the necessity of QoS mechanism in network development. Then this paper mainly describes the architecture of bcm565xx, one of Broadcom's switch chips, and then explains how the contentaware processor integrated on this powerful chip provides QoS services. Four types of processing engines included in the processor are described in detail: (1) lookup engine; (2) policy engine; (2) metering engine;) (4) the four kinds of processing engines of) statistics engine, cooperate with each other and correlate with each other to analyze and screen the sampled data layer by layer. According to the result of the query engine, the processor will generate a globally unique index value for the final matching data, and then obtain the corresponding policy in the decision engine according to the index value, and then set up the hardware register by using the policy. Enables the hardware to be properly driven to complete the user's configuration instructions. After that, an example is given to show how to use the switch chip to provide users with a variety of QoS services in the Ethernet environment through secondary development. These QoS services include user data classification, congestion avoidance, queue technology, etc. Flow regulation and traffic shaping and so on. Finally, the future development trend of IP network QoS is prospected, and the related concepts and application schemes of Hierachical QoS are introduced, which meet the needs of various applications of access network, backbone network and even core network.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2014
【分類號(hào)】：TP393.09

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本文編號(hào)：2378570