X-DSP中千兆以太網(wǎng)MAC控制器的設(shè)計(jì)與實(shí)現(xiàn)
[Abstract]:Ethernet technology is the most important technology in computer network communication. After more than 40 years' development, it has been widely used in industrial control and communication system. MAC controller is an important device of Ethernet. The function of MAC sub-layer in the data link layer of OSI model is completed. In this paper, a gigabit Ethernet MAC controller is designed based on the multi-core high-performance digital signal processor (X-DSP), which provides a gigabit rate network interface for X-DSP. According to the performance requirement of X-DSP and the analysis of Ethernet MAC sublayer, the function of MAC controller is clarified, and the overall structure of MAC controller of Gigabit Ethernet and the clock management scheme are designed. An independent data path and configuration path are used to realize the connection between the MAC controller and the upper layer logic. The data path adopts AXI interface based on burst and can read and write in parallel to ensure the efficient transmission of receiving and transmitting data. The configuration path uses simplified AXI interface to realize the read and write operation of registers in MAC controller. In order to realize the data transmission rate of MAC controller 10Mbps/100Mbps/1000Mbps, two types of PHY interfaces, MII and GMII, are designed, and a variety of address filtering methods, such as address matching and hash table, are provided. The parallel CRC-32 algorithm is used to verify the Ethernet frame. The half-duplex and full-duplex communication modes are supported. In the half-duplex mode, the transmission mechanism of multi-channel carrier listening / collision detection (CSMA/CD) and the flow control mechanism of back pressure are adopted. In full duplex mode, the flow control mode based on pause frame is designed. The MAC controller is to be sent, the received data and related control information are cached and processed synchronously by two asynchronous FIFO with depth of 512 and bit width of 133. According to the two levels of module level and system level, the verification platform is built, and the function and timing of MAC controller are simulated and verified. The results of verification and synthesis show that the function of MAC controller is correct and meets the design requirements.
【學(xué)位授予單位】:國防科學(xué)技術(shù)大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2014
【分類號】:TP393.11
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